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MAX1393 Datasheet, PDF (4/19 Pages) Maxim Integrated Products – 1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/ 2-Channel Single-Ended, 12-Bit, SAR ADCs
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1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +1.5V to +3.6V, VREF = VDD, CREF = 0.1µF, fSCLK = 5MHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
Tri-State Leakage Current
Tri-State Output Capacitance
POWER SUPPLY
Positive Supply Voltage
Positive Supply Current (Note 3)
SYMBOL
ILT
COUT
OE = VDD
OE = VDD
CONDITIONS
VDD
fSAMPLE = 100ksps
VDD = 1.6V
VDD = 3V
IDD
fSAMPLE = 312.5ksps
VDD = 1.6V
VDD = 3V
Power-down mode (Note 4)
MIN TYP MAX UNITS
±1
µA
10
pF
1.5
3.6
V
176 200
225 260
520 600
µA
710 800
5
10
Power-Supply Rejection
Power-down mode (Note 5)
PSR VDD = 1.5V to 3.6V, full-scale input (Note 6)
0.2 ±2.5
±150 ±1000
µV/V
TIMING CHARACTERISTICS
(VDD = +1.5V to +3.6V, VREF = VDD, CREF = 0.1µF, fSCLK = 5MHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Figure 1)
PARAMETER
SCLK Clock Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup
SCLK Rise to CS Fall Ignore
SCLK Fall to DOUT Valid
OE Rise to DOUT Disable
OE Fall to DOUT Enable
CS Pulse-Width High or Low
OE Pulse-Width High or Low
CH1/CH2 Setup Time (to the
First SCLK)
SYMBOL
tCP
tCH
tCL
tCSS
tCSO
tDOV
tDOD
tDOE
tCSW
tOEW
CONDITIONS
CLOAD = 0 to 30pF
tCHS
MAX1396 only
MIN TYP MAX UNITS
200
10,000 ns
90
ns
90
ns
80
ns
0
ns
10
80
ns
6
20
ns
9
20
ns
80
ns
80
ns
10
ns
CH1/CH2 Hold Time (to the First
SCLK)
tCHH
MAX1396 only
0
ns
UNI/BIP Setup Time (to the First
SCLK)
tUBS
MAX1393 only
10
ns
UNI/BIP Hold Time (to the First
SCLK)
tUBH
MAX1393 only
0
ns
Note 1: VDD = 1.5V, VREF = 1.5V, and VAIN = 1.5V.
Note 2: VDD = 1.5V, VREF = 1.5V, VAIN = 1.5VP-P, fSCLK = 5MHz, fSAMPLE = 312.5ksps, and fIN (sine wave) = 75kHz.
Note 3: All digital inputs swing between VDD and GND. VREF = VDD, fIN = 75kHz sine wave, VAIN = VREFP-P, CLOAD = 30pF on DOUT.
Note 4: CS = VDD, OE = UNI/BIP = CH1/CH2 = VDD or GND, SCLK is active.
Note 5: CS = VDD, OE = UNI/BIP = CH1/CH2 = VDD or GND, SCLK is inactive.
Note 6: Change in VAIN at code boundary 4094.5.
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