MAX1393 Datasheet, PDF (13/19 Pages) Maxim Integrated Products – 1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/ 2-Channel Single-Ended, 12-Bit, SAR ADCs

1.5V to 3.6V, 312.5ksps, 1-Channel True-Differential/
2-Channel Single-Ended, 12-Bit, SAR ADCs
ADC POWER-
STATE DOWN
OE
UNI/BIP
(CH1/CH2)*
CS
16
SCLK
POWER-UP
AND ACQUIRE
(t_ACQ)
BIPOLAR (AIN1)*
1
2
3
SAMPLING INSTANT
4
5
6
7
HOLD
AND CONVERT
(t_CONV)
POWER-
DOWN
UNI (AIN2)*
FS
8
9
10
11
12
13 14
15
16
1
2
DOUT
D0
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
*INDICATES THE MAX1396
Figure 10. DSP Serial-Timing Diagram
As shown in Figure 11, drive the MAX1393/MAX1396
chip-select input (CS) with the DSP’s frame-sync signal.
OE may be connected to GND or driven independently.
For continuous conversion operation, keep OE low and
make the CS falling edge coincident with the 16th
falling edge of the SCLK.
Unregulated Two-Cell or Single Lithium
LiMnO₂ Cell Operation
Low operating voltage (1.5V to 3.6V) and ultra-low-power
consumption make the MAX1393/MAX1396 ideal for low
cost, unregulated, battery-powered applications without
the need for a DC-DC converter. Power the MAX1393/
MAX1396 directly from two alkaline/NiMH/NiCd cells in
series or a single lithium coin cell as shown in the Typical
Operating Circuit.
Fresh alkaline cells have a voltage of approximately
1.5V per cell (3V with 2 cells in series) and approach
end of life at 0.8V (1.6V with 2 cells in series). A typical
2xAA alkaline discharge curve is shown in Figure 12a.
A typical CR2032 lithium (LiMnO₂) coin cell discharge
curve is shown in Figure 12b.
Layout, Grounding, and Bypassing
For best performance, use PC boards. Board layout
must ensure that digital and analog signal lines are
separated from each other. Do not run analog and digi-
tal (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 13 shows the recommended system ground
connections. Establish a single-point analog ground
(star ground point) at the MAX1393/MAX1396s’ GND
pin or use the ground plane.
High-frequency noise in the power supply (V_DD)
degrades the ADC’s performance. Bypass V_DD to GND
with a 0.1µF capacitor as close to the device as possi-
ble. Minimize capacitor lead lengths for best supply
noise rejection. To reduce the effects of supply noise, a
10Ω resistor can be connected as a lowpass filter to
attenuate supply noise.
Exposed Pad
The MAX1393/MAX1396 TDFN package has an
exposed pad on the bottom of the package. This pad is
not internally connected. Connect the exposed pad to
the GND pin on the MAX1393/MAX1396 or leave float-
ing for proper electrical performance.
Definitions
Integral Nonlinearity (INL)
INL is the deviation of the values on an actual transfer
function from a straight line. For the MAX1393/
MAX1396, this straight line is between the end points of
the transfer function once offset and gain errors have
been nullified. INL deviations are measured at every
step and the worst-case deviation is reported in the
Electrical Characteristics section.
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