MAX1086_07 Datasheet, PDF (4/17 Pages) Maxim Integrated Products – 150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23

150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23
TIMING CHARACTERISTICS (Figures 1 and 2)
(V_DD = +2.7V to +3.6V, V_REF = +2.5V for MAX1087/MAX1089, or V_DD = +4.75V to +5.25V, V_REF = +4.096V for MAX1086/MAX1088,
0.1µF capacitor at REF, f_SCLK = 8MHz (50% duty cycle); AIN- = GND for MAX1088/MAX1089. T_A = T_MIN to T_MAX, unless otherwise
noted. Typical values at T_A = +25°C.)
PARAMETERS
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to DOUT Transition
SCLK Rise to DOUT Disable
CNVST Rise to DOUT Enable
CNVST Fall to MSB Valid
CNVST Pulse Width
SYMBOL
t_CH
t_CL
t_DOT
t_DOD
t_DOE
t_DOV
t_CSW
CONDITIONS
C_LOAD = 30pF
C_LOAD = 30pF
C_LOAD = 30pF
C_LOAD = 30pF
MIN TYP MAX UNITS
38
ns
38
ns
60
ns
100
500
ns
80
ns
3.7
µs
30
ns
Note 1: Unipolar input.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have
been removed.
Note 3: Offset nulled.
Note 4: The absolute input range for the analog inputs is from GND to V_DD.
CNVST
• • •
SCLK
• • •
t_DOE
HIGH-Z
DOUT
• • •
Figure 1. Detailed Serial-Interface Timing Sequence
t_CH
t_CL
t_DOT
t_CSW
t_DOD
HIGH-Z
DOUT
6kΩ
C_L
GND
a) HIGH -Z TO V_OH, V_OL TO V_OH, AND V_OH TO HIGH -Z
DOUT
V_DD
6kΩ
C_L
GND
a) HIGH -Z TO V_OL, V_OH TO V_OL, AND V_OL TO HIGH -Z
Figure 2. Load Circuits for Enable/Disable Times
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