MAX1533A Datasheet, PDF(32/38 Page) Maxim Integrated Products – High-Efficiency, 5x Output, Main Power-Supply Controllers for Notebook Computers

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MAX1533A Datasheet, PDF (32/38 Pages) Maxim Integrated Products – High-Efficiency, 5x Output, Main Power-Supply Controllers for Notebook Computers

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High-Efficiency, 5x Output, Main Power-Supply

Controllers for Notebook Computers

The 40/60 optimal interleaved architecture of the

MAX1533A/MAX1537A allows the input voltage to go

as low as 8.3V before the duty cycles begin to overlap.

This offers improved efficiency over a regular 180Â° out-

of-phase architecture where the duty cycles begin to

overlap below 10V. Figure 10 shows the input-capacitor

RMS current vs. input voltage for an application that

requires 5V/5A and 3.3V/5A. This shows the improve-

ment of the 40/60 optimal interleaving over 50/50 inter-

leaving and in-phase operation.

For most applications, nontantalum chemistries (ceram-

ic, aluminum, or OS-CON) are preferred due to their

resistance to power-up surge currents typical of sys-

tems with a mechanical switch or connector in series

with the input. Choose a capacitor that has less than

10Â°C temperature rise at the RMS input current for opti-

mal reliability and lifetime.

Power-MOSFET Selection

Most of the following MOSFET guidelines focus on the

challenge of obtaining high load-current capability

when using high-voltage (>20V) AC adapters. Low-cur-

rent applications usually require less attention.

The high-side MOSFET (NH) must be able to dissipate

the resistive losses plus the switching losses at both

INPUT CAPACITOR RMS CURRENT

vs. INPUT VOLTAGE

5.0

4.5

4.0

3.5

IN PHASE

3.0 50/50 INTERLEAVING

2.5

2.0

1.5

1.0

0.5

40/60 OPTIMAL

INTERLEAVING

5V/5A AND 3.3V/5A

8 10 12 14 16 18 20

VIN (V)

INPUT RMS CURRENT FOR INTERLEAVED OPERATION

IRMS =

(IOUT5 - IIN)2 (DLX5 - DOL) + (IOUT3 - IIN)2 (DLX3 - DOL) +

(IOUT5 + IOUT3 - IIN)2 DOL + IIN2 (1 - DLX5 - DLX3 + DOL)

DLX5

VOUT5

VIN

DLX3

VOUT3

VIN

DOL = DUTY-CYCLE OVERLAP FRACTION

INPUT RMS CURRENT FOR SINGLE-PHASE OPERATION

( ) IRMS = ILOAD VOUT (VIN - VOUT)

VIN

Figure 10. Input RMS Current

VIN(MIN) and VIN(MAX). Ideally, the losses at VIN(MIN)

should be roughly equal to the losses at VIN(MAX), with

lower losses in between. If the losses at VIN(MIN) are

significantly higher, consider increasing the size of NH.

Conversely, if the losses at VIN(MAX) are significantly

higher, consider reducing the size of NH. If VIN does

not vary over a wide range, maximum efficiency is

achieved by selecting a high-side MOSFET (NH) that

has conduction losses equal to the switching losses.

Choose a low-side MOSFET (NL) that has the lowest

possible on-resistance (RDS(ON)), comes in a moder-

ate-sized package (i.e., SO-8, DPAK, or D2PAK), and is

reasonably priced. Ensure that the MAX1533A/

MAX1537A DL_ gate driver can supply sufficient cur-

rent to support the gate charge and the current injected

into the parasitic drain-to-gate capacitor caused by the

high-side MOSFET turning on; otherwise, cross-

conduction problems may occur. Switching losses are

not an issue for the low-side MOSFET since it is a zero-

voltage switched device when used in the step-down

topology.

Power-MOSFET Dissipation

Worst-case conduction losses occur at the duty factor

extremes. For the high-side MOSFET (NH), the worst-

case power dissipation due to resistance occurs at

minimum input voltage:

( ) PD (NH

Resistive)

ââ

VOUT

VIN

â â

ILOAD

2 RDS(ON)

Generally, use a small high-side MOSFET to reduce

switching losses at high input voltages. However, the

RDS(ON) required to stay within package power-dissi-

pation limits often limits how small the MOSFET can be.

The optimum occurs when the switching losses equal

the conduction (RDS(ON)) losses. High-side switching

losses do not become an issue until the input is greater

than approximately 15V.

Calculating the power dissipation in high-side

MOSFETs (NH) due to switching losses is difficult, since

it must allow for difficult-to-quantify factors that influ-

ence the turn-on and turn-off times. These factors

include the internal gate resistance, gate charge,

threshold voltage, source inductance, and PC board

layout characteristics. The following switching loss cal-

culation provides only a very rough estimate and is no

substitute for breadboard evaluation, preferably includ-

ing verification using a thermocouple mounted on NH:

( )2

VIN(MAX) CRSS fSW ILOAD

PD (NH Switching) =

IGATE

32 ______________________________________________________________________________________

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