MAX1567ETL Datasheet, PDF (3/8 Pages) Maxim Integrated Products – PLASTIC ENCAPSULATED DEVICES

II. Manufacturing Information
A. Description/Function:
B. Process:
C. Number of Device Transistors:
D. Fabrication Location:
E. Assembly Location:
F. Date of Initial Production:
Six-Channel, High-Efficiency, Digital Camera Power Supplies
B8 (Standard 0.8 micron silicon gate CMOS)
9420
California, USA
Thailand
July, 2003
III. Packaging Information
A. Package Type:
40-Lead Thin QFN (6 x 6)
B. Lead Frame:
Copper
C. Lead Finish:
Solder Plate
D. Die Attach:
Silver-Filled Epoxy
E. Bondwire:
Gold (1.3 mil dia.)
F. Mold Material:
Epoxy with silica filler
G. Assembly Diagram:
# 05-9000-0520
H. Flammability Rating:
Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-A112:
Level 1
IV. Die Information
A. Dimensions:
127 x 147 mils
B. Passivation:
C. Interconnect:
Si₃N₄/SiO₂ (Silicon nitride/ Silicon dioxide)
Aluminum/Copper/Silicon
D. Backside Metallization:
None
E. Minimum Metal Width:
.8 microns (as drawn)
F. Minimum Metal Spacing:
.8 microns (as drawn)
G. Bondpad Dimensions:
5 mil. Sq.
H. Isolation Dielectric:
I. Die Separation Method:
SiO₂
Wafer Saw