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MAX1518B Datasheet, PDF (3/25 Pages) Maxim Integrated Products – TFT-LCD DC-DC Converter with Operational Amplifiers
TFT-LCD DC-DC Converter with
Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3V, VSUP = 8V, PGND = AGND = BGND = 0, IREF = 25µA, TA = 0°C to +85°C. Typical values are at TA = +25°C, unless other-
wise noted.)
PARAMETER
LX On-Resistance
LX Leakage Current
LX Current Limit
Current-Sense
Transconductance
Soft-Start Period
Soft-Start Step Size
OPERATIONAL AMPLIFIERS
SUP Supply Range
SUP Supply Current
Input Offset Voltage
Input Bias Current
Input Common-Mode Range
Common-Mode Rejection Ratio
Open-Loop Gain
SYMBOL
RLX(ON)
ILX
ILIM
CONDITIONS
VLX = 13V
VFB = 1V, duty cycle = 65%
tSS
VSUP
ISUP
VOS
IBIAS
VCM
CMRR
Buffer configuration, VPOS_ = 4V, no load
(VNEG_, VPOS_, VOUT_) ≅ VSUP / 2,
TA = +25°C
(VNEG_ , VPOS_, VOUT_) ≅ VSUP / 2
0 ≤ (VNEG_, VPOS_) ≤ VSUP
MIN TYP MAX UNITS
160 250
mΩ
0.02
40
µA
2.5
3.0
3.5
A
3.0
3.8
5.0
S
14
ms
ILIM / 8
A
4.5
13.0
V
2.4
3.8
mA
0
12
mV
+1
±50
nA
0
VSUP
V
45
dB
125
dB
Output Voltage Swing, High
VOH
IOUT_ = 100µA
IOUT_ = 5mA
Output Voltage Swing, Low
Short-Circuit Current
VOL
IOUT_ = -100µA
IOUT_ = -5mA
To VSUP / 2, source or sink
Output Source and Sink Current
(VNEG_ , VPOS_, VOUT_) ≅ VSUP / 2,
|∆VOS| < 10mV (|∆VOS| < 30mV for OUT3)
Power-Supply Rejection Ratio
PSRR
DC, 6V ≤ VSUP ≤ 13V,
(VNEG_, VPOS_) ≅ VSUP/2
Slew Rate
-3dB Bandwidth
Gain-Bandwidth Product
GBW
RL = 10kΩ, CL = 10pF, buffer configuration
Buffer configuration
GATE-ON LINEAR-REGULATOR CONTROLLER
FBP Regulation Voltage
FBP Fault Trip Level
FBP Input Bias Current
VFBP
IFBP
IDRVP = 100µA
VFBP falling
VFBP = 1.4V
FBP Effective Load-Regulation
Error (Transconductance)
VDRVP = 10V, IDRVP = 50µA to 1mA
VSUP - VSUP -
15
3
VSUP - VSUP -
150
80
2
80
50
150
40
60
13
12
8
1.231
0.96
-50
1.250
1.00
-0.7
15
150
1.269
1.04
+50
-1.5
mV
mV
mA
mA
dB
V/µs
MHz
MHz
V
V
nA
%
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