MAX1518B Datasheet, PDF (22/25 Pages) Maxim Integrated Products – TFT-LCD DC-DC Converter with Operational Amplifiers

TFT-LCD DC-DC Converter with
Operational Amplifiers
The transconductance amplifier regulates the output
voltage by controlling the pass transistor’s base cur-
rent. The total DC loop gain is approximately:
A_V
_ LR
≅


10
V_T


×

1+



I_BIAS × h_FE
I_{LOAD _ LR}





×
V_REF
where V_T is 26mV at room temperature, and I_BIAS is the
current through the base-to-emitter resistor (R_BE). For
the MAX1518B, the bias currents for both the gate-on
and gate-off linear-regulator controllers are 0.1mA.
Therefore, the base-to-emitter resistor for both linear
regulators should be chosen to set 0.1mA bias current:
R_BE
=
V_BE
0.1mA
=
0.7V
0.1mA
≈ 6.8kΩ
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capaci-
tor’s ESR generates a zero. For proper operation, use
the following equations to verify the linear regulator is
properly compensated:
1) First, determine the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
f_{POLE _ LR}
=
2π
×
I_{LOAD(MAX) _ LR}
C_{OUT _LR} × V_{OUT _LR}
The unity-gain crossover of the linear regulator is:
f_CROSSOVER = A_{V_LR} ✕ f_{POLE_LR}
2) The pole created by the internal amplifier delay is
approximately 1MHz:
f_{POLE_AMP} = 1MHz
3) Next, calculate the pole set by the transistor’s
input capacitance, the transistor’s input resistance,
and the base-to-emitter pullup resistor:
f_{POLE _IN}
=
2π
×
C_IN
1
× (R_BE
|| R_IN)
where C_IN =
g_m
2πf_T
,
R_IN
=
h_{FE ,}
g_m
g_m is the transconductance of the pass transistor,
and f_T is the transition frequency. Both parameters
can be found in the transistor’s data sheet. Because
R_BE is much greater than R_IN, the above equation
can be simplified:
f_{POLE _IN}
=
2π
×
1
C_IN
× R_IN
Substituting for C_IN and R_IN yields:
f_POLE
_IN
=
f_T
h_FE
4) Next, calculate the pole set by the linear regula-
tor’s feedback resistance and the capacitance
between FB_ and AGND (including stray capaci-
tance):
f_POLE
_ FB
=
2π
×
C_FB
×
1
(R_UPPER
||
R_LOWER)
where C_FB is the capacitance between FB_ and
AGND, R_UPPER is the upper resistor of the linear
regulator’s feedback divider, and R_LOWER is the
lower resistor of the divider.
5) Next, calculate the zero caused by the output
capacitor’s ESR:
f_{POLE _ ESR}
=
2π
×
1
C_{OUT _LR}
× R_ESR
where R_ESR is the equivalent series resistance of
C_{OUT_LR}.
To ensure stability, choose C_{OUT_LR} large enough so
the crossover occurs well before the poles and zero
calculated in steps 2 to 5. The poles in steps 3 and 4
generally occur at several megahertz, and using
ceramic capacitors ensures the ESR zero occurs at
several megahertz as well. Placing the crossover below
500kHz is sufficient to avoid the amplifier-delay pole
and generally works well, unless unusual component
choices or extra capacitances move one of the other
poles or the zero below 1MHz.
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