MAX1510 Datasheet, PDF (3/13 Pages) Maxim Integrated Products – Low-Voltage DDR Linear Regulator

Low-Voltage DDR Linear Regulator
ELECTRICAL CHARACTERISTICS (continued)
(V_IN = 1.8V, V_CC = 3.3V, V_REFIN = V_OUTS = 1.25V, SHDN = V_CC, circuit of Figure 1, T_A = -40°C to +85°C, unless otherwise noted.
Typical values are at T_A= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
REFERENCE
REFIN Voltage Range
REFIN Input Bias Current
V_REFIN
I_REFIN
0.5
1.5
V
-1
+1
µA
REFIN Undervoltage-Lockout
Voltage
Rising edge, hysteresis = 75mV
0.35 0.45
V
REFOUT Voltage
REFOUT Load Regulation
FAULT DETECTION
Thermal-Shutdown Threshold
V_CC Undervoltage-Lockout
Threshold
V_REFOUT V_CC = 3.3V, I_REFOUT = 0
∆V_REFOUT I_REFOUT = ±5mA
T_SHDN
V_UVLO
Rising edge, hysteresis = 15°C
Rising edge, hysteresis = 100mV
V_REFIN
-0.01
V_REFIN
V_REFIN
+0.01
V
-20
+20
mV
+165
°C
2.45 2.55 2.65
V
IN Undervoltage-Lockout
Threshold
Rising edge, hysteresis = 55mV
0.9
1.1
V
Current-Limit Threshold
Soft-Start Current-Limit Time
INPUTS AND OUTPUTS
I_LIMIT
t_SS
1.8
3
4.2
A
200
µs
PGOOD Lower Trip Threshold
With respect to feedback threshold,
hysteresis = 12mV
-200 -150 -100
mV
PGOOD Upper Trip Threshold
With respect to feedback threshold,
hysteresis = 12mV
100
150
200
mV
PGOOD Propagation Delay
t_PGOOD
OUTS forced 25mV beyond PGOOD trip
threshold
5
10
35
µs
PGOOD Startup Delay
Startup rising edge, OUTS within ±100mV of
the feedback threshold
1
2
3.5
ms
PGOOD Output Low Voltage
I_SINK = 4mA
0.3
V
PGOOD Leakage Current
I_PGOOD
OUTS = REFIN (PGOOD high impedance),
PGOOD = V_CC + 0.3V
1
µA
SHDN Logic Input Threshold
Logic high
Logic low
2.0
V
0.8
V
SHDN Logic Input Current
SHDN = V_CC or GND
-1
+1
µA
Note 1: Limits are 100% production tested at T_A = +25°C. Limits over the operating temperature range are guaranteed through cor-
relation using statistical-quality-control (SQC) methods.
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