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MAX1276 Datasheet, PDF (3/18 Pages) Maxim Integrated Products – 1.8Msps, Single-Supply, Low-Power, True-Differential, 12-Bit ADCs with Internal Reference
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1.8Msps, Single-Supply, Low-Power, True-
Differential, 12-Bit ADCs with Internal Reference
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V ±5%, VL = VDD, fSCLK = 28.8MHz, 50% duty cycle, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
DC Leakage Current
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
±1
µA
Input Capacitance
Input Current (Average)
REFERENCE OUTPUT (REF)
Per input pin
16
pF
Time averaged at maximum throughput rate
75
µA
REF Output Voltage Range
Static, TA = +25°C
4.086 4.096 4.106
V
Voltage Temperature Coefficient
Load Regulation
Line Regulation
DIGITAL INPUTS (SCLK, CNVST)
Input Voltage Low
VIL
Input Voltage High
VIH
Input Leakage Current
IIL
POWER REQUIREMENTS
Analog Supply Voltage
VDD
Digital Supply Voltage
VL
Analog Supply Current,
Normal Mode
IDD
Analog Supply Current,
Partial Power-Down Mode
IDD
Analog Supply Current,
Full Power-Down Mode
IDD
Digital Supply Current (Note 8)
Positive-Supply Rejection
DIGITAL OUTPUT (DOUT)
Output Load Capacitance
Output Voltage Low
Output Voltage High
Output Leakage Current
PSR
COUT
VOL
VOH
IOL
ISOURCE = 0 to 2mA
ISINK = 0 to 200µA
VDD = 4.75V to 5.25V, static
Output high impedance
Static, fSCLK = 28.8MHz
Static, no SCLK
Operational, 1.8Msps
fSCLK = 28.8MHz
No SCLK
fSCLK = 28.8MHz
No SCLK
Operational, full-scale input at 1.8Msps
Static, fSCLK = 28.8MHz
Partial/full power-down mode,
fSCLK = 28.8MHz
Static, no SCLK, all modes
VDD = 5V ±5%, full-scale input
For stated timing performance
ISINK = 5mA, VL ≥ 1.8V
ISOURCE = 1mA, VL ≤ 1.8V
Output high impedance
±50
ppm/°C
0.3
mV/mA
0.5
0.5
mV/V
0.3 x VL V
0.7 x VL
V
±0.2 ±10
µA
4.75
5.25
V
1.8
VDD
V
8
11
5
7
mA
10
13
2
mA
2
1
µA
0.3
1
1
2.5
0.4
1
mA
0.2
0.5
0.1
1
µA
±0.2 ±3.0
mV
30
pF
0.4
V
VL - 0.5V
V
±0.2 ±10
µA
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