MAX1193EVKIT Datasheet, PDF (3/13 Pages) Maxim Integrated Products – MAX1193 Evaluation Kit

MAX1193 Evaluation Kit
c) To evaluate single-ended DC-coupled analog
signals, verify that shunts are installed on pins 1
and 2 of jumpers JU2 and JU3, and no shunts are
installed on jumpers JU1, JU4, JU5 and JU6.
Remove capacitors C2 and C3 and resistors R2
and R3. Install 0Ω resistors on the R5 and R6.
Connect the outputs of the anti-aliasing filters to
the S/E_INA+ and S/E_INB+ SMA connectors.
d) To evaluate differential DC-coupled analog sig-
nals, verify that shunts are installed on pins 1
and 2 of jumpers JU2 and JU3, and no shunts
are installed on jumpers JU1, JU4, JU5, and
JU6. Remove capacitors C2 and C3 and resis-
tors R2 and R3. Install 0Ω resistors on the R5
and R6. Connect the outputs of the anti-aliasing
filters to the S/E_INA+/- and S/E_INB+/- SMA
connectors.
11) Enable the function generators. Set the clock func-
tion generator for an output amplitude of 2.4V_P-P
(+11.6dBm) and a frequency (f_CLK) of ≤45MHz. Set
the analog input signal generators to the desired
output test signal amplitudes and frequencies. The
two function generators should be phase locked to
each other.
12) Channel A data is presented on the falling edge
and channel B data is presented on the rising edge
of the logic analyzer clock.
13) Enable the logic analyzer, and begin collecting
data.
Detailed Description
The MAX1193 EV kit is a fully assembled and tested cir-
cuit board that contains all the components necessary to
evaluate the performance of the MAX1191/MAX1192/
MAX1193 dual 8-bit ADCs. The ADCs provide the digi-
tized data of their two input channels in multiplexed fash-
ion on a single 8-bit bus. The EV kit comes with the
MAX1193 installed, which can be evaluated with a maxi-
mum clock frequency (f_CLK) of 45MHz. The MAX1193
accepts differential or single-ended analog input signals.
With the proper board configuration (as specified below),
the input signals can be AC- or DC-coupled.
The EV kit is based on a four-layer PC board design to
optimize the performance of the MAX1193. Separate ana-
log and digital power planes minimize noise coupling
between analog and digital signals. For simple operation,
the EV kit is specified to have 3.3V and 2.5V power sup-
plies applied to analog and digital power planes, respec-
tively. However, the digital plane can be operated from
1.8V to 3.3V without compromising performance. The
logic analyzer’s threshold must be adjusted accordingly.
Access to the digital outputs is provided through head-
er J1 for channels A and B. The 0.1in 20-pin header
easily interfaces with a user-provided logic analyzer or
data acquisition system.
Power Supplies
The MAX1193 EV kit requires separate analog and digital
power supplies for best performance. A 3.3V power sup-
ply is used to power the analog portion of the MAX1193
(VADUT) and the on-board clock-shaping circuit (VA).
The MAX1193 analog supply voltage has an operating
range of 2.7V to 3.6V. Note that 3.3V must be supplied to
the VA pads to meet the minimum supply voltage of the
clock-shaping circuit. A separate 2.5V power supply is
used to power the digital portion (VODUT and VDB) of
the MAX1193 and the buffer/driver (U3); however, it can
operate with a supply voltage as low as 1.8V and as high
as 3.6V. The digital power-supply voltage must not
exceed the analog power-supply voltage.
Clock
An on-board clock-shaping circuit generates a clock
signal from an AC sine-wave signal applied to the
CLKIN SMA connector. The input signal should not
exceed a magnitude of 2.6V_P-P (+12.3dBm). The fre-
quency of the signal should not exceed 45MHz for the
MAX1193. The frequency of the sinusoidal input signal
determines the sampling frequency of the ADC.
Differential line receiver U2 processes the input signal
to generate the CMOS clock signal. The signal’s duty
cycle can be adjusted with potentiometer R16. A clock
signal with a 50% duty cycle (recommended) can be
achieved by adjusting R16 until 1.38V (40% of the ana-
log power supply) is produced across test points TP1
and GND when the analog supply voltage is set to
3.3V. The clock signal is available at the header pin J1-
1, which can be used as a clock source for the logic
analyzer. Additionally, the signal pin J1-11 (A/ B) is an
image of the clock signal.
Input Signals
The MAX1193 accepts differential or single-ended, AC-
DC-coupled analog input signals. The EV kit accepts
input signals with full-scale amplitude of less than
1.024V_P-P (+4dBm). See Table 1 for proper jumper
configuration.
Note: When a differential signal is applied to the ADC,
the positive and negative input pins of the ADC each
receive half of the input signal supplied at SMA con-
nectors D/E_INA and D/E_INB with a DC offset voltage
of VADUT/2.
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