MAX11202_12 Datasheet, PDF (3/14 Pages) Maxim Integrated Products – 24-Bit, Single-Channel, Ultra-Low-Power, Delta Sigma ADC with 2-Wire Serial Interface

MAX11202
24-Bit, Single-Channel, Ultra-Low-Power, Delta
Sigma ADC with 2-Wire Serial Interface
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = +3.6V, VDVDD = +1.8V, VREFP - VREFN = VAVDD; internal clock, TA = TMIN to TMAX, unless otherwise noted. Typical values
are at TA = +25NC under normal conditions, unless otherwise noted.)
PARAMETER
AIN Input Capacitance
REF Input Capacitance
AIN Voltage Range
REF Voltage Range
Input Sampling Rate
REF Sampling Rate
LOGIC INPUTS (SCLK, CLK)
Input Current
Input Low Voltage
SYMBOL
CONDITIONS
AINP - AINN
MAX11202A
fS
MAX11202B
MAX11202A
MAX11202B
Input leakage current
VIL
Input High Voltage
VIH
Input Hysteresis
External Clock
LOGIC OUTPUT (RDY/DOUT)
Output Low Level
VHYS
MAX11202A
MAX11202B
VOL IOL = 1mA; also tested for VDVDD = 3.6V
Output High Level
VOH IOH = 1mA; also tested for VDVDD = 3.6V
Floating State Leakage Current
Output leakage current
Floating State Output
Capacitance
POWER REQUIREMENTS
Analog Supply Voltage
AVDD
Digital Supply Voltage
DVDD
Total Operating Current
AVDD + DVDD
DVDD Operating Current
AVDD Operating Current
AVDD Sleep Current
DVDD Sleep Current
2-WIRE SERIAL-INTERFACE TIMING CHARACTERISTICS
SCLK Frequency
SCLK Pulse Width Low
SCLK Pulse Width High
fSCLK
t1
t2
60/40 duty cycle, 5MHz clock
40/60 duty cycle, 5MHz clock
SCLK Rising Edge to Data Valid
Transition Time
t3
MIN
-VREF
TYP MAX UNITS
10
pF
15
pF
+VREF V
VAVDD V
246
kHz
225
246
kHz
225
Q1
0.3 x
VDVDD
0.7 x
VDVDD
200
2.4576
2.2528
FA
V
V
mV
MHz
0.4
V
0.9 x
VDVDD
V
Q10
FA
9
pF
2.7
3.6
V
1.7
3.6
V
230 300
FA
45
60
FA
185 245
FA
0.4
2
FA
0.35
2
FA
5
MHz
80
ns
80
ns
40
ns
Maxim Integrated
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