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MAX1233_05 Datasheet, PDF (29/45 Pages) Maxim Integrated Products – ±15kV ESD-Protected Touch-Screen Controllers Include DAC and Keypad Controller
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
DAC Data Register
The DAC data register stores data that is to be written
to the 8-bit DAC. Table 36 shows the configuration of
the DAC data register. It is right justified with bit 7–bit 0
storing the input data.
GPIO Data Register
Tables 37 and 38 show the format and descriptions for
the GPIO data register. The register is left justified with
data in bit 15–bit 8. Reading the GPIO data register
gives the state of the R_ and C_ pins. Data written to
the GPIO data register appears on those R_ and C_
pins, which are configured as general-purpose outputs.
Data written to pins not configured as general-purpose
outputs is not stored.
ADC Transfer Function
The MAX1233/MAX1234 output data is in straight bina-
ry format as shown in Figure 11. This figure shows the
ideal output code for the given input voltage and does
not include the effects of offset error, gain error, noise,
or nonlinearity.
Applications Information
Programmable 8-/10-/12-Bit Resolution
The MAX1233/MAX1234 provide the option of three dif-
ferent resolutions for the ADC: 8, 10, or 12 bits. Lower
resolutions are practical for some measurements such
as touch pressure. Lower resolution conversions have
smaller conversion times and therefore consume less
power. Program the resolution of the MAX1233/
MAX1234 12-bit ADCs by writing to the RES1 and RES0
bits in the ADC control register. When the MAX1233/
MAX1234 power up, both bits are set to zero so the
resolution is set to 8 bits with a 31µs internally timed
reference power-up delay as indicated by the ADC res-
olution control table. As explained in the control register
section, the RES1 and RES0 bits control the reference
OUTPUT CODE
11 ... 111
11 ... 110
11 ... 101
FULL-SCALE
TRANSITION
MAX1233
MAX1234
Table 35. Keypad to Key Bit Mapping
COMPONENT
C1
R1
K0
R2
K1
R3
K2
R4
K3
C2
C3
C4
K4
K8
K12
K5
K9
K13
K6
K10
K14
K7
K11
K15
00 ... 011
00 ... 010
00 ... 001
00 ... 000
0
123
INPUT VOLTAGE (LSB)
FS = VREF
ZS = GND
1LSB
=
VREF
4096
FS
FS - 3/2LSB
Figure 11. Ideal Input Voltages and Output Codes
Table 36. DAC Data Register
BIT15 BIT14 BIT13 BIT12 BIT11 BIT10 BIT9 BIT8 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
0
0
0
0
0
0
0
0 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Table 37. GPIO Data Register
BIT15 BIT14 BIT13 BIT12 BIT11 BIT10 BIT9 BIT8 BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
GPD7 GPD6 GPD5 GPD4 GPD3 GPD2 GPD1 GPD0 0
0
0
0
0
0
0
0
Table 38. GPIO Data Register Descriptions
BIT
15...8
7...0
NAME
GPD7...0
0
GPIO data bits for GPIO pins 7...0
Reserved
DESCRIPTION
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