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DS2155 Datasheet, PDF (236/240 Pages) Maxim Integrated Products – T1/E1/J1 Single-Chip Transceiver
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DS2155
37.5 Transmit AC Characteristics
AC CHARACTERISTICS: TRANSMIT SIDE
(Figure 37-12, Figure 37-13, and Figure 37-14)
(VDD = 3.3V ±5%, TA = -40°C to +85°C for DS2155L; VDD = 3.3V ±5%, TA = 0°C to +70°C for DS2155LN)
PARAMETER
SYMBOL CONDITIONS MIN TYP (E1) MAX
TCLK Period
TCLK Pulse Width
TCLKI Period
TCLKI Pulse Width
TSYSCLK Period
TSYSCLK Pulse Width
TSYNC or TSSYNC Setup to TCLK or
TSYSCLK Falling
tCP
tCH
tCL
tLP
tLH
tLL
(Note 8)
(Note 9)
tSP
(Note 10)
(Note 11)
(Note 12)
tSP
tSU
488 (E1)
648 (T1)
20
0.5 tCP
20
0.5 tCP
488 (E1)
648 (T1)
20
0.5 tLP
20
0.5 tLP
648
448
244
122
61
20
0.5 tSP
20
0.5 tSP
20
TSYNC or TSSYNC Pulse Width
tPW
TSER, TSIG, TDATA, TLINK, TPOSI,
TNEGI Setup to TCLK, TSYSCLK,
tSU
TCLKI Falling
TSER, TSIG, TDATA, TLINK Hold
from TCLK or TSYSCLK Falling
tHD
TPOSI, TNEGI Hold from TCLKI
Falling
tHD
TCLK, TCLKI or TSYSCLK Rise and
Fall Times
tR, tF
Delay TCLKO to TPOSO, TNEGO
Valid
tDD
Delay TCLK to TESO, UT-UTDO
Valid
tD1
Delay TCLK to TCHBLK, TCHCLK,
TSYNC, TLCLK
tD2
Delay TSYSCLK to TCHCLK,
TCHBLK
tD3
50
20
20
20
25
50
50
50
22
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 8: TSYSCLK = 1.544MHz
Note 9: TSYSCLK = 2.048MHz
Note 10: TSYSCLK = 4.096MHz
Note 11: TSYSCLK = 8.192MHz
Note 12: TSYSCLK = 16.384MHz
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