MAX11120_V2 Datasheet, PDF (23/40 Pages) Maxim Integrated Products – 1Msps, Low-Power, Serial 12-/10-/8-Bit, 4-/8-/16-Channel ADCs

MAX11120–MAX11128
1Msps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
into ADC memory, the pattern may be repeated indefi-
nitely or changed at any time.
For example, the maximum throughput of MAX11120–
MAX11128 is 1Msps. Traditional ADC scan modes allow
up to 16-channel conversions in ascending order. In this
case, the effective throughput per channel is 1Msps/16
channel or 62.5ksps. The maximum input frequency that
the ADC can resolve (Nyquist Theorem) is 31.25kHz.
If all 16 channels must be measured, with some chan-
nels having greater than 31.25kHz input frequency, the
user must revert back to manual mode requiring con-
stant communication on the serial interface. SampleSet
technology solves this problem. Figure 9 provides a
SampleSet use-model example.
SAMPLE SET
(DEPTH = 256)
1ST CYCLE 2ND CYCLE
3RD CYCLE
SampleSet REPEATS: LENGTH = 256
4TH CYCLE 5TH CYCLE 6TH CYCLE 7TH CYCLE
8TH CYCLE
9TH CYCLE
AIN2 /
CHANNEL: _{AIN3 AIN0 AIN1 AIN0 AIN1}
ENTRY NO.: ¹
2
3
4
5
POTENTIAL SampleSet PATTERN
AIN2 /
AIN0 AIN1 AIN3 AIN4 AIN5
AIN2 /
AIN6 AIN7 AIN8 AIN9 AIN10 AIN11 AIN12 AIN13 AIN14 AIN15 AIN3
AIN0 AIN1
120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135
136 137
AIN2 /
AIN0 AIN1 _AIN3
254 255 256
120 CONVERSIONS:
AIN0 AND AIN1
ANALOG
INPUTS
120 CONVERSIONS:
AIN0 AND AIN1
AIN0
100kHz
100 CYCLES
AIN1
10kHz
10 CYCLES
1kHz
1 CYCLES
135
1 _{122 256}
123
124
125
tS = 1/fS = 1/1Msps = 100ns
CS
AIN0
6
8
10
12
14
4
16
2
32
18
TS
fin = 100kHz
5µs
20
30 10µs
28
22 _{24 26}
AIN1
7 ^{9 11}
13
5
15
3
17
31
TS
5µs 19
29
10µs
21
23 ₂₅ ²⁷
AIN2
FULLY
DIFFERENTIAL
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
AIN11
AIN12
AIN13
Figure 9. SampleSet Use-Model Example
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