MAX16929 Datasheet, PDF (22/25 Pages) Maxim Integrated Products – Automotive TFT-LCD Power Supply with Boost Converter and Gate Voltage Regulators

MAX16929
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
Boost Converter
Power dissipation in the boost converter is primarily due
to conduction and switching losses in the low-side FET.
Conduction loss is produced by the inductor current
flowing through the on-resistance of the FET during the
on-time. Switching loss occurs during switching transi-
tions and is a result of the finite time needed to fully turn
on and off the FET. Power dissipation in the boost con-
verter can be estimated with the following formula:
P_LXP ≈ [(I_IN(DC,MAX) × √D)² × R_{DS_ON(LXP)}] + V_SH ×
I_IN(DC,MAX) × f_SW × [(t_R-V + t_F-I) + (t_R-I + t_F-V)]
where I_IN(DC,MAX) is the maximum expected average
input (i.e., inductor) current, D is the duty cycle of the
boost converter, R_{DS_ON(LXP)} is the on-resistance of
the internal low-side FET, V_SH­ is the output voltage, and
f_SW is the switching frequency of the boost converter.
R_{DS_ON(LXP)} is 110mI (typ) and f_SW is 2.2MHz.
The voltage and current rise and fall times at the LXP
node are equal to t_R-V (voltage rise time), t_F-V (voltage fall
time), t_R-I (current rise time), and t_F-I (current fall time),
and are determined as follows:
t _R-V
=
V_SH
+
V_SCHOTTKY
K _R-V
t _F-V
=
V_SH
+
V_SCHOTTKY
K _F-V
t
R-I
=
I_IN(DC,MAX)
K _R-I
t
F-I
=
I_IN(DC,MAX)
K _F-I
K_R-V, K_F-V, K_R-I, and K_F-I are the voltage and current
slew rates of the LXP node and are supply dependent.
Use Table 5 to determine their values.
Positive-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
in supplying power to the positive-gate voltage regulator.
Doing so minimizes the drain-source voltage of the inte-
grated pMOS switch and power dissipation. The power
dissipated in the switch is given as:
P_GH = (V_CP - V_GH) × I_{LOAD(MAX)_GH}
Ensure that the voltage on CP does not exceed the
CP overvoltage threshold as given in the Electrical
Characteristics table.
Negative-Gate Voltage Regulator
Use the lowest number of charge-pump stages possible
to provide the negative voltage to the negative-gate
voltage regulator. Estimate the power dissipated in the
negative-gate voltage regulator using the following:
P_GL = (V_INA + |V_CN| - V_BE) × I_DRVN
where V_BE is the base-emitter voltage of the external npn
bipolar transistor, and I_DRVN is the current sourced from
DRVN to the R_BE bias resistor and to the base of the
transistor, which is given by:
I_DRVN
= ^VBE
R_BE
+
I_GL
h _FE +1
1.8V/3.3V Regulator Controller
The power dissipated in the 1.8V/3.3V regulator controller
is given by:
P_REG = (V_INA - V_{OUT_REG} - V_BE) × I_DR
where V_{OUT_REG} = 1.8V or 3.3V, V_BE is the base-emitter
voltage of the external npn bipolar transistor, and I_DR is
the current sourced from DR to the base of the transistor.
I_DR is given by:
I_DR
=
I_LOAD
h_FE + 1
where I_LOAD is load current of the 1.8V/3.3V regulator
controller, and h_FE is the current gain of the transistor.
Table 5. LXP Voltage and Current Slew Rates vs. Supply Voltage
V_INA (V)
3.3
5
RISING VOLTAGE
SLEW RATE
K_R-V (V/ns)
0.52
1.35
LXP VOLTAGE AND CURRENT SLEW RATES
FALLING VOLTAGE
SLEW RATE
K_F-V (V/ns)
1.7
2
RISING CURRENT
SLEW RATE
K_R-I (A/ns)
0.13
0.3
FALLING CURRENT
SLEW RATE
K_F-I (A/ns)
0.38
0.44
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