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MAX1630_05 Datasheet, PDF (22/29 Pages) Maxim Integrated Products – Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Table 5. Low-Voltage Troubleshooting Chart
SYMPTOM
CONDITION
ROOT CAUSE
Sag or droop in VOUT under Low VIN-VOUT
step-load change
differential, <1.5V
Limited inductor-current
slew rate per cycle.
Dropout voltage is too high
(VOUT follows VIN as VIN
decreases)
Unstable—jitters between
different duty factors and
frequencies
Secondary output won’t
support a load
Poor efficiency
Won’t start under load or
quits before battery is
completely dead
Low VIN-VOUT
differential, <1V
Maximum duty-cycle limits
exceeded.
Low VIN-VOUT
differential, <0.5V
Low VIN-VOUT
differential,
VIN < 1.3 x VOUT (main)
Low input voltage, <5V
Low input voltage, <4.5V
Normal function of internal
low-dropout circuitry.
Not enough duty cycle left
to initiate forward-mode
operation. Small AC current
in primary can’t store ener-
gy for flyback operation.
VL linear regulator is going
into dropout and isn’t provid-
ing good gate-drive levels.
VL output is so low that it
hits the VL UVLO threshold.
SOLUTION
Increase bulk output capacitance
per formula (see Low-Voltage
Operation section). Reduce inductor
value.
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Increase the minimum input voltage
or ignore.
Reduce operation to 200kHz.
Reduce secondary impedances;
use a Schottky diode, if possible.
Stack secondary winding on the
main output.
Use a small 20mA Schottky diode
for boost diode D2. Supply VL from
an external source.
Supply VL from an external source
other than VIN, such as the system
+5V supply.
________________Applications Information
Heavy-Load Efficiency Considerations
The major efficiency-loss mechanisms under loads are,
in the usual order of importance:
• P(I2R) = I2R losses
• P(tran) = transition losses
• P(gate) = gate-charge losses
• P(diode) = diode-conduction losses
• P(cap) = capacitor ESR losses
• P(IC) = losses due to the IC’s operating supply
supply current
Inductor core losses are fairly low at heavy loads
because the inductor’s AC current component is small.
Therefore, they aren’t accounted for in this analysis.
Ferrite cores are preferred, especially at 300kHz, but
powdered cores, such as Kool-Mu, can work well.
Efficiency = POUT / PIN x 100%
= POUT / (POUT + PTOTAL ) x 100%
PTOTAL = P(I2R) + P(tran) + P(gate) +
P(diode) + P(cap) + P(IC)
P = (I2R) = (ILOAD)2 x (RDC + RDS(ON) + RSENSE)
where RDC is the DC resistance of the coil, RDS(ON) is
the MOSFET on-resistance, and RSENSE is the current-
sense resistor value. The RDS(ON) term assumes identi-
cal MOSFETs for the high-side and low-side switches,
because they time-share the inductor current. If the
MOSFETs aren’t identical, their losses can be estimat-
ed by averaging the losses according to duty factor.
PD(tran) = transition loss = VIN x ILOAD x f x
3
2
x
[ ] (VIN x CRSS / IGATE) + 20ns
where CRSS is the reverse transfer capacitance of the
high-side MOSFET (a data-sheet parameter), IGATE is the
DH gate-driver peak output current (1.5A typical), and
20ns is the rise/fall time of the DH driver (20ns typical).
P(gate) = qG x f x VL
where VL is the internal-logic-supply voltage (+5V), and qG
is the sum of the gate-charge values for low-side and high-
side switches. For matched MOSFETs, qG is twice the
data-sheet value of an individual MOSFET. If VOUT is set to
less than 4.5V, replace VL in this equation with VBATT. In
this case, efficiency can be improved by connecting VL to
an efficient 5V source, such as the system +5V supply.
P(diode) = diode - conduction losses
= ILOAD x VFWD x tD x f
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