MAX1636 Datasheet, PDF (21/24 Pages) Maxim Integrated Products – Low-Voltage, Precision Step-Down Controller for Portable CPU Power

Low-Voltage, Precision Step-Down
Controller for Portable CPU Power
Table 6. Low-Voltage Troubleshooting Chart
SYMPTOM
CONDITION
ROOT CAUSE
Sag or droop in V_OUT under Low V_IN-V_OUT
step-load change
differential, <1.5V
Limited inductor-current
slew rate per cycle.
Dropout voltage is too high
(V_OUT follows V_IN as V_IN
decreases)
Unstable—jitters between
different duty factors and
frequencies
Poor efficiency
Won’t start under load or
quits before battery is
completely dead
Low V_IN-V_OUT
differential, <1V
Maximum duty-cycle limits
exceeded.
Low V_IN-V_OUT
differential, <0.5V
Low input voltage, <5V
Low input voltage, <4.5V
Normal function of internal
low-dropout circuitry.
VL linear regulator is going
into dropout and isn’t provid-
ing good gate-drive levels.
VL output is so low that it
hits the VL UVLO threshold.
SOLUTION
Increase bulk output capacitance
per formula (see Low-Voltage
Operation section). Reduce inductor
value.
Reduce operation to 200kHz.
Reduce MOSFET on-resistance and
coil DCR.
Increase the minimum input voltage
or ignore.
Use a small 20mA Schottky diode
for boost diode. Supply VL from an
external source.
Supply VL from an external source
other than V_IN, such as the system
+5V supply.
where R_DC is the DC resistance of the coil, R_DS(ON) is
the MOSFET on-resistance, and R_SENSE is the current-
sense resistor value. The R_DS(ON) term assumes identi-
cal MOSFETs for the high-side and low-side switches
because they time-share the inductor current. If the
MOSFETs are not identical, their losses can be estimat-
ed by averaging the losses according to duty factor.
PD(tran) = transition loss = V_IN x I_LOAD x f x 3/2 x
[(V_IN C_RSS / I_GATE ) + 20ns]
where C_RSS is the reverse transfer capacitance of the
high-side MOSFET (a data-sheet parameter), I_GATE is
the DH gate-driver peak output current (1.5A typ), and
20ns is the rise/fall time of the DH driver (20ns typ).
P(gate) = Q_g x f x VL
where VL is the internal logic-supply voltage (+5V), and
Q_g is the sum of the gate-charge values for low-side
and high-side switches. For matched MOSFETs, Q_g is
twice the data-sheet value of an individual MOSFET. If
V_OUT is set to less than 4.5V, replace VL in this equa-
tion with V_BATT. In this case, efficiency can be
improved by connecting VL to an efficient 5V source,
such as the system +5V supply.
P(diode) = diode conduction losses =
I_LOAD x V_FWD x t_D x f
where t_D is the diode-conduction time (120ns typ), and
V_FWD is the forward voltage of the diode. This power is
dissipated in the MOSFET body diode if no external
Schottky diode is used.
P(cap) = input capacitor ESR loss = I_RMS2 x R_ESR
where I_RMS is the input ripple current as calculated in
the Input Capacitor Value section.
Light-Load Efficiency Considerations
Under light loads, the PWM operates in discontinuous
mode, where the inductor current discharges to zero at
some point during the switching cycle. This makes the
inductor current’s AC component high compared to the
load current, which increases core losses and I²R loss-
es in the output filter capacitors. For best light-load effi-
ciency, use MOSFETs with moderate gate-charge
levels and use ferrite, MPP, or other low-loss core mate-
rial. Avoid powdered-iron cores; even Kool-Mu
(aluminum alloy) is not as good as ferrite.
PC Board Layout Considerations
Good PC board layout is required in order to achieve
specified noise, efficiency, and stable performance.
The PC board layout artist must be given explicit
instructions, preferably a pencil sketch showing the
placement of power-switching components and high-
current routing. See the PC board layout in the
MAX1636 evaluation kit manual for examples. A ground
plane is essential for optimum performance. In most
applications, the circuit will be located on a multi-layer
board, and full use of the four or more copper layers
is recommended. Use the top layer for high-current
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