MAX16929_12 Datasheet, PDF (20/25 Pages) Maxim Integrated Products – Automotive TFT-LCD Power Supply with Boost Converter and Gate Voltage Regulators

MAX16929
Automotive TFT-LCD Power Supply with Boost
Converter and Gate Voltage Regulators
voltage of 5V to (V_CP - 2V) and an output current of
10mA to 15mA, use a minimum capacitance of 0.47FF.
Negative-Gate Voltage Regulator
Output-Voltage Selection
The output voltage of the negative-gate voltage regula-
tor can be adjusted by using a resistive voltage-divider
formed by R_TOP and R_BOTTOM. Connect R_TOP between
REF and FBGL, and connect R_BOTTOM between FBGL
and the collector of the external npn transistor. Select
R_TOP greater than 20kI to avoid loading down the ref-
erence output. Calculate R_BOTTOM with the following
equation:
R_BOTTOM
=
R _TOP
×
V_FBGL
V_REF −
− V_GL
V_FBGL
where V_GL is the desired output voltage, V_REF = 1.25V,
and V_FBGL = 0.25V (the regulated feedback voltage of
the regulator).
Pass Transistor Selection
The pass transistor must meet specifications for current
gain (h_FE), input capacitance, collector-emitter saturation
voltage, and power dissipation. The transistor’s current
gain limits the guaranteed maximum output current to:
I_LOAD(MAX)
=
(I_DRVN
−
V_BE
R_BE
)
×
h_FE(MIN)
where I_DRVN is the minimum guaranteed base-drive cur-
rent, V_BE is the transistor’s base-to-emitter forward volt-
age drop, and R_BE is the pulldown resistor connected
between the transistor’s base and emitter. Furthermore,
the transistor’s current gain increases the regulator’s DC
loop gain (see the Stability Requirements section), so
excessive gain destabilizes the output.
The transistor’s saturation voltage at the maximum output
current determines the minimum input-to-output volt-
age differential that the regulator can support. Also, the
package’s power dissipation limits the usable maximum
input-to-output voltage differential. The maximum power-
dissipation capability of the transistor’s package and
mounting must exceed the actual power dissipated in
the device. The power dissipated equals the maximum
load current (I_{LOAD(MAX)_GL}) multiplied by the maximum
input-to-output voltage differential:
P_{NPN_GL} = (V_GL - V_CN) × I_{LOAD(MAX)_GL}
where V_GL is the regulated output voltage on the collec-
tor of the transistor, V_CN is the inverting charge-pump
output voltage applied to the emitter of the transistor,
and I_{LOAD(MAX)_GL} is the maximum load current. Note
that the external transistor is not short-circuit protected.
Stability Requirements
The device’s negative-gate voltage regulator uses an
internal transconductance amplifier to drive an external
pass transistor. The transconductance amplifier, the
pass transistor, the base-emitter resistor, and the output
capacitor determine the loop stability.
The transconductance amplifier regulates the output volt-
age by controlling the pass transistor’s base current. The
total DC loop gain is approximately:
A _{V_GL}
≅
(4
V_T
)×
(1+
I_BIAS × h_FE
I_LOAD
)
×
V_REF
where V_T is 26mV at room temperature, and I_BIAS is the
current through the base-to-emitter resistor (R_BE). For
the device, the bias current for the negative-gate voltage
regulator is 0.1mA. Therefore, the base-to-emitter resistor
should be chosen to set 0.1mA bias current:
R_BE
=
V_BE
0.1mA
=
0.7V
0.1mA
=
7kΩ
Use the closest standard resistor value of 6.8kI. The
output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capacitor’s
ESR generates a zero. For proper operation, use the fol-
lowing equations to verify that the regulator is properly
compensated:
1) First, determine the dominant pole set by the regula-
tor’s output capacitor and the load resistor:
f_{POLE_GL}
=
I_{LOAD(MAX)_GL}
2π × C_{OUT_GL} × V_{OUT_GL}
The unity-gain crossover frequency of the regulator is:
f_CROSSOVER = A_{V_GL} × f_{POLE_GL}
2) The pole created by the internal amplifier delay is
approximately 1MHz:
f_{POLE_AMP} = 1MHz
3) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and the
base-to-emitter pullup resistor:
���������������������������������������������������������������� Maxim Integrated Products   20