MAX1236 Datasheet, PDF (19/22 Pages) Maxim Integrated Products – 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
OUTPUT CODE
011...111
011...110
FS
=
V_REF
2
+
AIN-
ZS = AIN-
000...010
000...001
000...000
-FS
=
-V_REF
2
+
AIN-
1
LSB
=
V_REF
4096
111...111
111...110
111...101
100...001
100...000
-FS+1/2 LSB
AIN- ≥
V_REF
2
AIN-
INPUT VOLTAGE (LSB)
Figure 13. Bipolar Transfer Function
+FS - 1 LSB
High-frequency noise in the power supply (V_DD) could
influence the proper operation of the ADC’s fast com-
parator. Bypass V_DD to the star ground with a network of
two parallel capacitors, 0.1µF and 4.7µF, located as
close as possible to the MAX1236–MAX1239 power-sup-
ply pin. Minimize capacitor lead length for best supply
noise rejection, and add an attenuation resistor (5Ω) in
series with the power supply if it is extremely noisy.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values on
an actual transfer function from a straight line. This straight
line can be either a best straight-line fit or a line drawn
between the endpoints of the transfer function, once offset
and gain errors have been nullified. The MAX1236–
MAX1239’s INL is measured using the endpoint.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A
DNL error specification of less than 1 LSB guarantees
no missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (t_AJ) is the sample-to-sample variation in
the time between the samples.
3V OR 5V
SUPPLIES
V_LOGIC = 3V/5V GND
R* = 5Ω
4.7µF
0.1µF
V_DD
GND
3V/5V DGND
MAX1236–
MAX1239
DIGITAL
CIRCUITRY
*OPTIONAL
Figure 14. Power-Supply Grounding Connection
Aperture Delay
Aperture delay (t_AD) is the time between the falling
edge of the sampling clock and the instant when an
actual sample is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital sam-
ples, the theoretical maximum SNR is the ratio of the full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum ana-
log-to-digital noise is caused by quantization error only
and results directly from the ADC’s resolution (N Bits):
SNR_MAX[dB] = 6.02_dB ✕ N + 1.76_dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all other ADC output signals.
SINAD(dB)
=
20
×
log
 SignalRMS
^{NoiseRMS + THDRMS}


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