DS4830_1110 Datasheet, PDF (19/29 Pages) Maxim Integrated Products – Optical Microcontroller

DS4830
Optical Microcontroller
Stack Memory
A 16-bit, 16-level internal stack provides storage for
program return addresses and general-purpose use.
The stack is used automatically by the processor when
the CALL, RET, and RETI instructions are executed and
interrupts serviced. The stack can also be used explicitly
to store and retrieve data by using the PUSH, POP, and
POPI instructions.
On reset, the stack pointer, SP, initializes to the top of the
stack (0Fh). The CALL, PUSH, and interrupt-vectoring
operations increment SP, then store a value at the location
pointed to by SP. The RET, RETI, POP, and POPI opera-
tions retrieve the value at SP and then decrement SP.
Programming
The microcontroller’s flash memory can be programmed
by one of two methods: in-system programming or in-
application programming. These provide great flexibility in
system design as well as reduce the life-cycle cost of the
embedded system. Programming can be password pro-
tected to prevent unauthorized access to code memory.
In-System Programming
An internal bootstrap loader allows the device to be pro-
grammed over the JTAG or I²C compatible interfaces.
As a result, system software can be upgraded in-system,
eliminating the need for a costly hardware retrofit when
software updates are required.
The programming source select (PSS) bits in the ICDF
register determine which interface is used for bootload-
ing operation. The device supports JTAG and I²C as an
interface corresponding to the 00 and 01 bits of PSS,
respectively. See Figure 7.
In-Application Programming
The in-application programming feature allows the micro-
controller to modify its own flash program memory. This
allows on-the-fly software updates in mission-critical
DS4830 RESET INITIATED BY
POR, I²C SELF-RESET, OR
RST PIN.
RESET DEVICE.
BEGIN BOOT ROM CODE
EXECUTION AT 8000h.
WAIT FOR 320 SYSTEM
CYCLES (32µs). RESET I²C.
SET PWL BIT.
SET ROD BIT.
IS JTAG_SPE BIT SET? ^YES
BOOTLOADER
NO
ROM CODE ENABLES
SLAVE I²C INTERFACE:
ADDRESS IS 36h (1Bh).
SET USING JTAG PROGRAMMER,
FOLLOWED BY RESET OF DEVICE.
SET BY WRITING F0h TO I²C SLAVE
34h (1Ah).
IS I2C_SPE BIT SET? ^YES
SET PSS[1:0] = 01
NO
JUMP TO USER CODE
(FLASH) AT 0000h.
WAITS FOR EXIT LOADER
COMMAND FROM HOST
Figure 7. In-System Programming
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