MAX6851 Datasheet, PDF (18/37 Pages) Maxim Integrated Products – 2-Wire Interfaced, 7-, 14-, and 16-Segment Alpha numeric Vacuum -Fluorescent

2-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-
numeric Vacuum-Fluorescent Display Controller
Table 15. Annunciator Registers Format
ANNUNCIATOR BYTE
REGISTER DATA
D7
D6
D5
D4
D3
D2
D1
D0
BIT ALLOCATIONS
ANNUNCIATOR ANNUNCIATOR ANNUNCIATOR ANNUNCIATOR
A4
A3
A2
A1
Annunciator A1 is off.
X
X
X
X
X
X
0
0
Annunciator A1 is lit only for the first half of each blink
period.
X
X
X
X
X
X
0
1
Annunciator A1 is lit only for the second half of each blink
period.
X
X
X
X
X
X
1
0
Annunciator A1 is lit continuously.
Annunciator A2 is off.
X
X
X
X
X
X
1
1
X
X
X
X
0
0
X
X
Annunciator A2 is lit only for the first half of each blink
period.
X
X
X
X
0
1
X
X
Annunciator A2 is lit only for the second half of each blink
period.
X
X
X
X
1
0
X
X
Annunciator A2 is lit continuously.
Annunciator A3 is off.
X
X
X
X
1
1
X
X
X
X
0
0
X
X
X
X
Annunciator A3 is lit only for the first half of each blink
period.
X
X
0
1
X
X
X
X
Annunciator A3 is lit only for the second half of each blink
X
X
1
0
X
X
X
X
period.
Annunciator A3 is lit continuously.
Annunciator A4 is off.
X
X
1
1
X
X
X
X
0
0
X
X
X
X
X
X
Annunciator A4 is lit only for the first half of each blink
period.
0
1
X
X
X
X
X
X
Annunciator A4 is lit only for the second half of each blink
1
0
X
X
X
X
X
X
period.
Annunciator A4 is lit continuously.
1
1
X
X
X
X
X
X
Table 16. Configuration Register Format
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Configuration
register
P
M
R
T
F
B
L
S
Table 17. Shutdown Control (S Data Bit
D0) Format
MODE
Shutdown
Normal operation
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
PMR T F B L 0
PMR T F B L 1
Configuration Lock (L Data Bit D1) Format
The configuration lock register is a safety feature to
reduce the risk of the VFD configuration settings being
inadvertently changed due to spurious writes if soft-
ware fails. When set, the shift-limit register (0x0E), grids
register (0x03), and output map data (0x06) can be
read but cannot be written. The output map data point-
er itself may be written in order to allow the output map
data to be read back (Table 18).
Blink Rate Selection (B Data Bit D2) Format
The B bit in the configuration register selects the blink
rate of the cursor and annunciator segments. This is the
speed that the segments blink on and off when blinking is
selected for these segments. The frequency of the multi-
plex clock OSC and the setting of the B bit (Table 19)
determine the blink rate.
18 ______________________________________________________________________________________