MAX1610 Datasheet, PDF (17/20 Pages) Maxim Integrated Products – Digitally Controlled CCFL Backlight Power Supplies

Digitally Controlled CCFL Backlight
Power Supplies
MOST
SIGNIFICANT
ADDRESS BIT
START
CONDITION
LEAST
SIGNIFICANT
SLAVE
ADDRESS BIT ACKNOWLEDGE
R/W BIT
MOST
SIGNIFICANT
DATA BIT
SCL
SDA
OTPOK
DA4 DA3 DA2 DA1 DA0
SLAVE PULLS
SDA LOW
MAX1611 DRIVES SDA
Figure 13. MAX1611 Serial-Interface Read Example
Table 6. MAX1611 Status Bits
BIT
NAME
POR
STATE*
FUNCTION
7
OTPOK
Latched Open-Tube Detection. OTPOK = 0 indicates that open-tube detection has been
1
triggered. As soon as the voltage on the OTP pin exceeds REF, the OTPOK bit is cleared.
Reset the OTPOK pin by entering shutdown or standby.
6
—
5
—
4
DA4
3
DA3
2
DA2
1
DA1
0
DA0
—
—
Unused. These bits always return a logic one.
Displays the DAC setting selected by SMBSUS.
* Initial register state after power-up.
two 7-bit registers is used. Tables 4 and 5 describe the
data format for the configuration data.
Status information can be read from the MAX1611
using the SMBus read-byte protocol. Figure 13 shows
an example status read. Table 6 describes the status
information data format.
During shutdown (SMBSUS = 0 and SHDNB-0 = 0, or
SMBSUS = 1 and SHDNB-1 = 0), the MAX1611 serial
interface remains fully functional and can be used to set
either the SHDNB-0 or SHDNB-1 bits in order to return
the MAX1611 to its normal operational state.
_______ Chopping the Lamp Current
Chopping the lamp current allows lower sustainable light
levels without lamp flicker. Intensity is varied by control-
ling the on-time duty cycle. Tying MINDAC to VL acti-
vates a special mode, which allows the CCFL intensity to
be varied by turning the lamp on and off at a frequency
faster than the eye can detect. The SS pin pulls to GND
during off time and rises to 2.7V during on time. During
on time, the CSAV pin regulates to REF / 8 (250mV).
During off time, the BATT-to-LX power switch is forced
off and the CC compensation node goes high imped-
ance. Omit R5, R6, and C4 of the circuit in Figure 4.
In this mode, leave SS floating and increase the CC
capacitance to 0.1µF. Also, insert a 330Ω resistor in series
with D1 (Figure 4) to prevent the open-lamp detection cir-
cuit from being tripped by the repeated striking of the
lamp. The SS pin will oscillate at the switching frequency
divided by 1024 (283Hz with SYNC = REF). The intensity
can be varied with the duty cycle at the SS pin. The duty
cycle is set by the DAC in 3% increments. Duty cycle will
vary with intensity. Full-scale yields a 100% duty cycle.
DAC codes 00001, 00010, and 00011 all yield the
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