MAX14945 Datasheet, PDF (17/21 Pages) Maxim Integrated Products – 2.75kVRMS Isolated 500kbps Half-Duplex RS-485

MAX14945
2.75kV_RMS Isolated 500kbps Half-Duplex RS-485/
RS-422 Transceiver with ±30kV ESD Protection
Layout Considerations
It is recommended to design an isolation, or keep-out chan-
nel underneath the isolator that is free from ground and sig-
nal planes. Any galvanic or metallic connection between the
cable-side and UART-side defeats the isolation.
Ensure that the decoupling capacitors between V_DDA and
GNDA and between V_LDO, V_DDB, and GNDB are located
as close as possible to the IC to minimize inductance.
Route important signal lines close to the ground plane to
minimize possible external influences. On the cable-side
of the device, it is good practice to have the bus connec-
tors and termination resistor as close as possible to the
A and B pins.
Extended ESD Protection
ESD protection structures are incorporated on all pins
to protect against electrostatic discharge encountered
during handling and assembly. The driver outputs and
receiver inputs of the MAX14945 have extra protection
against static electricity to both the UART-side and cable-
side ground references. The ESD structures withstand
high-ESD events during normal operation and when pow-
ered down. After an ESD event, the devices keep working
without latch-up or damage.
Bypass V_DDA to GNDA and bypass V_DDB and V_LDO to
GNDB with 0.1μF and 1μF capacitors to ensure maxi-
mum ESD protection.
ESD protection can be tested in various ways. The
transmitter outputs and receiver inputs of the MAX14945
are characterized for protection to the cable-side ground
(GNDB) to the following limits:
●● ±30kV HBM
●● ±15kV using the Air-Gap Discharge method specified
in IEC 61000-4-2
●● ±10kV using the Contact Discharge method speci-
fied in IEC 61000-4-2
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model (HBM)
Figure 10 shows the HBM test model, while Figure 11
shows the current waveform it generates when dis-
charged in a low-impedance state. This model consists of
a 100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩ resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. However, it does not
specifically refer to integrated circuits. The MAX14945
help in designing equipment to meet IEC 61000-4-2 with-
out the need for additional ESD protection components.
The major difference between tests done using the HBM
and IEC 61000-4-2 is higher peak current in IEC 61000-
4-2 because series resistance is lower in the IEC 61000-
4-2 model. Hence, the ESD withstand voltage measured
to IEC 61000-4-2 is generally lower than that measured
using the HBM.
Figure 12 shows the IEC 61000-4-2 model and
Figure 13 shows the current waveform for IEC 61000-4-2
ESD Contact Discharge Test.
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