MAX5950 Datasheet, PDF (16/28 Pages) Maxim Integrated Products – 12V PWM Controller with Hot-Swap

12V PWM Controller with Hot-Swap
Power-Good Sequencing (PGOOD, SENSE)
The PGOOD outputs and DCENI inputs can be daisy-
chained to generate power sequencing. The PGOOD
output is pulled high when the voltage at SENSE is
above V_REF (800mV typ). Connect a resistive divider
from the power-supply output voltage to SENSE to
AGND to set the power-good threshold. See Figure 1
and the Typical Operating Circuits.
Error Amplifier
The output of the internal error amplifier (COMP) is avail-
able for frequency compensation (see the
Compensation Design Guidelines section). The inverting
input is FB; the output is COMP. The error amplifier has
an 80dB open-loop gain and a 2.5MHz GBW product.
See the Typical Operating Characteristics section for
the Open-Loop Gain and Phase vs. Frequency graph.
PWM Comparator
An internal ramp is compared against the output of the
error amplifier to generate the PWM signal. The ampli-
tude of the ramp, V_RAMP, is 1.8V.
Output Short-Circuit Protection
(Hiccup Mode)
The current-limit circuit employs a lossless valley cur-
rent-limiting algorithm that uses the MOSFET’s on-resis-
tance as the current-sensing element. Once the
high-side MOSFET turns off, the voltage across the low-
side MOSFET is monitored. If the voltage across the
low-side MOSFET (R_DS(ON) x I_INDUCTOR) does not
exceed the current-limit threshold, the high-side
MOSFET turns on normally at the start of the next cycle.
If the voltage across the low-side MOSFET exceeds the
current-limit threshold just before the beginning of a
new PWM cycle, the controller skips that cycle. During
severe overload or short-circuit conditions, the switch-
ing frequency of the device appears to decrease
because the on-time of the low-side MOSFET extends
beyond a clock cycle.
If the current-limit threshold is exceeded for eight cumu-
lative clock cycles (N_CL), the device shuts down (both
DH and DL are pulled low) for 512 clock cycles (hiccup
timeout) and restarts with a soft-start sequence. If three
consecutive cycles pass without a current-limit event,
the count of N_CL is cleared (Figure 2). Hiccup mode
protects against continuous output short circuit.
Thermal-Overload Protection
The MAX5950 features an integrated thermal-overload
protection with temperature hysteresis. Thermal-over-
load protection limits the total power dissipation in the
device and protects it in the event of an extended ther-
mal fault condition. When the die temperature exceeds
+135°C, an internal thermal sensor shuts down the
device, turning off the power MOSFETs and allowing
the die to cool. After the die temperature falls by
+15°C, the part restarts with a soft-start sequence.
Hot-Swap Controller Design
Procedures
Setting the Undervoltage Lockout
Connect an external resistive divider from IN to HUVLO
to AGND to override the internal hot-swap UVLO
divider. The rising threshold at HUVLO is set to 1.220V
with 120mV hysteresis. First, select the HUVLO to
AGND resistor (R2), then calculate the resistor from IN
to HUVLO (R1) using the following equation:
R1
=
R2 ×



V_IN
V_HUVLO
−

1_

where V_IN is the input voltage at which the hot-swap
controller needs to turn on, V_HUVLO = 1.220V, and R2
is chosen to be less than 20kΩ (see Figure 3).
Leave HUVLO unconnected for the default hot-swap
UVLO threshold. In this case, an internal voltage-
divider monitors the supply voltage at IN and allows
startup when IN rises above 7V (typ).
CURRENT LIMIT
IN ^{COUNT OF 8}
N_CL
CLR
INITIATE HICCUP
TIMEOUT
N_HT
IN
R1
HUVLO
R2
IN ^{COUNT OF 3}
N_CLR
CLR
Figure 2. Hiccup-Mode Block Diagram
Figure 3. External Hot-Swap UVLO Divider
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