MAX13325 Datasheet, PDF (16/21 Pages) Maxim Integrated Products – Dual Automotive, Audio Line Drivers with I2C Control and Diagnostic

Dual Automotive, Audio Line Drivers
with I²C Control and Diagnostic
Table 17. Overvoltage Diagnostic
FAULT CONDITION
STATUS REPORT
FLAG is asserted low.
FLAG bit set. See Table 7.
Overvoltage
Shutdown
DUMP bit is set in the GFAULT
register. See Table 4.
Left and right channels switch
off and output goes to a
high-impedance state.
UNMASK
In GMASK register, set
MDUMP bit to 1.
See Table 8.
RECOVERY
VDD voltage falls below overvoltage
threshold. Cleared on reading the
GFAULT register. Note: 500ms
autoretry in stand-alone mode.
Cannot be masked.
Left channel is enabled by setting
the RETRYL bit to 1. Right channel
is enabled by setting the RETRYR
bit to 1. See Table 3.
Applications Information
Serial Interface
Writing to the MAX13325/MAX13326 using I²C requires
that first the master sends a START (S) condition fol-
lowed by the device’s I²C address. After the address,
the master sends the register address of the register
that is to be programmed. The master then ends com-
munication by issuing a STOP (P) condition to relinquish
control of the bus, or a Repeated START (Sr) condition to
communicate to another I²C slave (see Figure 1).
Bit Transfer
Each SCL rising edge transfers one data bit. The data
on SDA must remain stable during the high portion of the
SCL clock pulse (see Figure 2). Changes in SDA while
SCL is high are read as control signals (see the START
and STOP Conditions section). When the serial interface
is inactive, SDA and SCL idle high.
SDA
tF
SCL
S
tLOW
tHD:STA
Figure 1. I²C Timing
tSU:DAT
tLOW
tF
tHD:DAT
tHIGH
t_SU:STA
Sr
tHD:STA
tSP
tR
tBUF
tSU:STO
P
S
Figure 2. Bit Transfer
SDA
SCL
DATA LINE
STABLE;
DATA VALID
CHANGE OF
DATA ALLOWED
16   �������������������������������������������������������������������������������������