DS3510 Datasheet, PDF (16/17 Pages) Maxim Integrated Products – I2C Gamma and VCOM Buffer with EEPROM

I²C Gamma and V_COM Buffer with EEPROM
TYPICAL I²C WRITE TRANSACTION
MSB
START 1 1 0 0 0 0
LSB
MSB
LSB
MSB
LSB
A0 R/W ^SLAVE b7 b6 b5 b4 b3 b2 b1 b0 ^SLAVE b7 b6 b5 b4 b3 b2 b1 b0 ^SLAVE STOP
ACK
ACK
ACK
SLAVE
ADDRESS*
READ/
WRITE
REGISTER ADDRESS
DATA
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PIN A0.
EXAMPLE I²C TRANSACTIONS (WHEN A0 IS CONNECTED TO GND)
A) SINGLE-BYTE WRITE
-WRITE LATCH A
GM8 TO 00h
C0h
08h
OOh
START 1 1 0 0 0 0 0 0 ^SLAVE 0 0 0 0 1 0 0 0 ^SLAVE 0 0 0 0 0 0 0 0 ^SLAVE
ACK
ACK
ACK
STOP
B) SINGLE-BYTE READ
-READ LATCH A GM2
C0h
02h
START 1 1 0 0 0 0 0 0 ^SLAVE 0 0 0 0 0 0 1 0 ^SLAVE
ACK
ACK
C1h
REPEATED _{1 1 0 0 0 0 0 1} SLAVE
START
ACK
DATA
I/O STATUS
MASTER _STOP
NACK
C) SINGLE-BYTE WRITE
-ENTER STANDBY MODE
C0h
51h
01h
START 1 1 0 0 0 0 0 0
SLAVE
ACK
0 1 0 1 0 0 0 1 ^SLAVE
ACK
0000 0 0 01
SLAVE
ACK
STOP
D) TWO-BYTE WRITE
- WRITE 10h AND 11h TO 80h
C0h
10h
80h
START 1 1 0 0 0 0 0 0
SLAVE
ACK
0 0 0 1 0 0 0 0 ^SLAVE
ACK
1000 0 0 00
SLAVE
ACK
80h
1000 0 0 00
SLAVE
ACK
STOP
E) TWO-BYTE READ
- READ 10h AND 11h
C0h
10h
START 1 1 0 0 0 0 0 0
SLAVE
ACK
0 0 0 1 0 0 0 0 ^SLAVE
ACK
REPEATED
START
C1h
SLAVE
1100 0 0 01
ACK
Figure 6. I²C Communication Examples
DATA
MASTER
ACK
DATA
MASTER
STOP
NACK
EEPROM write cycles: The DS3510’s EEPROM write
cycles are specified in the Nonvolatile Memory
Characteristics table. The specification shown is at the
worst-case temperature (hot) as well as at room tem-
perature.
Reading a single byte from a slave: Unlike the write
operation that uses the specified memory address byte
to define where the data is to be written, the read opera-
tion occurs at the present value of the memory address
counter. To read a single byte from the slave, the master
generates a START condition, writes the slave address
byte with R/W = 1, reads the data byte with a NACK to
indicate the end of the transfer, and generates a STOP
condition. However, since requiring the master to keep
track of the memory address counter is impractical, the
following method should be used to perform reads from
a specified memory location.
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition. Recall that the master must NACK the
last byte to inform the slave that no additional bytes will
be read.
See Figure 6 for I²C communication examples.
Reading multiple bytes from a slave: The read opera-
tion can be used to read multiple bytes with a single
transfer. When reading bytes from the slave, the master
simply ACKs the data byte if it desires to read another
byte before terminating the transaction. After the mas-
ter reads the last byte, it must NACK to indicate the end
of the transfer and generates a STOP condition.
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