DS3510 Datasheet, PDF (1/17 Pages) Maxim Integrated Products – I2C Gamma and VCOM Buffer with EEPROM

Rev 0; 2/08
I²C Gamma and V_COM Buffer with EEPROM
General Description
The DS3510 is a programmable gamma and VCOM volt-
age generator which supports both real-time updating
as well as multibyte storage of gamma/VCOM data in on-
chip EEPROM memory. An independent 8-bit DAC, two
8-bit data registers, and 4 bytes of EEPROM memory
are provided for each individually addressable gamma
or VCOM channel. High-performance buffer amplifiers
are integrated on-chip, providing rail-to-rail, low-power
(400µA/gamma channel) operation. The VCOM channel
features a high-current drive (> 250mA peak) and a fast-
settling buffer amplifier optimized to drive the VCOM
node of a wide range of TFT-LCD panels.
Programming occurs through an I²C-compatible serial
interface. Interface performance and flexibility are
enhanced by a pair of independently loaded data reg-
isters per channel, as well as support for I²C speeds up
to 400kHz. The multitable EEPROM memory enables a
rich variety of display system enhancements, including
support for temperature or light-level-dependent
gamma tables, enabling of factory or field automated
display adjustment, and support for backlight dimming
algorithms to reduce system power. Upon power-up
and depending on mode, DAC data is selected from
EEPROM by the S0/S1 pads or from a fixed memory
address.
Applications
TFT-LCD Gamma and VCOM Buffer
Adaptive Gamma and VCOM Adjustment (Real-
Time by I²C, Select EEPROM Through I²C or
S0/S1 Pads)
Industrial Process Control
Features
o 8-Bit Gamma Buffers, 10 Channels
o 8-Bit V_COM Buffer, 1 Channel
o 4 EEPROM Bytes per Channel
o Low-Power 400µA/ch Gamma Buffers
o I²C-Compatible Serial Interface
o Flexible Control from I²C or Pins
o 9.0V to 15.0V Analog Supply
o 2.7V to 5.5V Digital Supply
o 48-Pin Package (TQFN 7mm x 7mm)
Ordering Information
PART
TEMP RANGE
DS3510T+
-45°C to +95°C
DS3510T+T&R
-45°C to +95°C
+Denotes a lead-free package.
T&R = Tape and reel.
*EP = Exposed pad.
PIN-PACKAGE
48 TQFN-EP*
48 TQFN-EP*
Pin Configuration and Typical Operating Circuit appear at
end of data sheet.
Gamma or VCOM Channel Functional Diagram
SDA, SCL
A0
I²C
INTERFACE
LATCH A
8-BIT
MUX
LATCH B
DAC
VOUT
S1/ S0
LD
LOGIC
IN
OUT
EEPROM
ADDRESS
________________________________________________________________ Maxim Integrated Products 1
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or visit Maxim’s website at www.maxim-ic.com.