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MAX8654_09 Datasheet, PDF (15/17 Pages) Maxim Integrated Products – 12V, 8A 1.2MHz Step-Down Regulator
12V, 8A 1.2MHz
Step-Down Regulator
The above equations provide accurate compensation
when the zero-cross frequency is significantly higher
than the double-pole frequency. When the zero-cross
frequency is near the double-pole frequency, the actual
zero-cross frequency is higher than the calculated fre-
quency. In this case, lowering the value of R1 reduces the
zero-cross frequency. Also, set the third pole of the type 3
compensation close to the switching frequency if the
zero-cross frequency is above 200kHz to boost the phase
margin. Note that the value of R4 can be altered to make
the values of the compensation components practical.
The recommended range for R3 is 2kΩ to 10kΩ.
PCB Layout Considerations and Thermal
Performance
Careful PCB layout is critical to achieve clean and sta-
ble operation. It is highly recommended to duplicate
the MAX8654 EV kit layout for optimum performance. If
deviation is necessary, follow these guidelines for good
PCB layout:
1) Connect input and output capacitors, VVP and VVDL
capacitors to the power ground plane; connect all
other capacitors to the signal ground plane.
2) Place capacitors on VVP, VIN, VVL, VVDL, and SS as
close as possible to the IC and its corresponding pin
using direct traces. Keep power ground plane (con-
nected to PGND) and signal ground plane (connect-
ed to GND) separate.
3) Keep the high-current paths as short and wide as
possible. Keep the path of switching current short
and minimize the loop area formed by LX, the out-
put capacitors, and the input capacitors.
4) Connect IN, LX, and PGND separately to a large
copper area to help cool the IC to further improve
efficiency and long-term reliability.
5) Ensure all feedback connections are short and
direct. Place the feedback resistors and compensa-
tion components as close to the IC as possible.
6) Route high-speed switching nodes, such as LX,
away from sensitive analog areas (FB, COMP).
COMPENSATION
TRANSFER
FUNCTION
DOUBLE POLE
OPEN-LOOP
GAIN
THIRD
POLE
POWER-STAGE
TRANSFER FUNCTION
FIRST AND
SECOND ZEROS
f
Figure 4. Transfer Function for Type 3 Compensation
SECOND
POLE
ESR
ZERO
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