MAX15053_1107 Datasheet, PDF (15/21 Pages) Maxim Integrated Products – High-Efficiency, 2A, Current-Mode Synchronous, Step-Down Switching Regulator

High-Efficiency, 2A, Current-Mode
Synchronous, Step-Down Switching Regulator
tOFF1 is the time needed for inductor current to reach the
zero-current crossing limit (~ 0A):
t
OFF1
=
L
×
I_{SKIP−LIMIT}
V_OUT
During tON and tOFF1, the output capacitor stores a
charge equal to (see Figure 2):
∆Q _OUT
=
L x (I_{SKIP−LIMIT}
− I_LOAD)²
2

x


V_IN
1
− V_OUT
+
1
V_OUT



During tOFF2 (= n x tCK, number of clock cycles skipped),
output capacitor loses this charge:
t _OFF2
=
∆Q _OUT
I_LOAD
⇒
t _OFF2
=
L x (I_{SKIP−LIMIT}
−
I_LOAD
)
2
x



V_IN
2 xI_LOAD
1
− V_OUT
+
1
V_OUT



Finally, frequency in skip mode is:
f_SKIP
=
t _ON
+
1
t _OFF1
+
t _OFF2
Output ripple in skip mode is:
V_{OUT−RIPPLE} = V_{COUT−RIPPLE} + V_{ESR−RIPPLE}
= ^{(ISKIP−LIMIT − ILOAD) x t ON}
C _OUT
+ R_ESR,COUT x (I_{SKIP−LIMIT} − I_LOAD)
V_{OUT −RIPPLE}
=
 _Lx
_{C OUT}
I_{SKIP−LIMIT}
x (V_IN − V_OUT )
+

R_{ESR,COUT }

x (I_{SKIP−LIMIT} − I_LOAD)
To limit output ripple in skip mode, size COUT based on
the above formula. All the above calculations are appli-
cable only in skip mode.
Compensation Design Guidelines
The MAX15053 uses a fixed-frequency, peak-current-mode
control scheme to provide easy compensation and fast
transient response. The inductor peak current is monitored
on a cycle-by-cycle basis and compared to the COMP
voltage (output of the voltage error amplifier). The regula-
tor’s duty cycle is modulated based on the inductor’s peak
current value. This cycle-by-cycle control of the inductor
current emulates a controlled current source. As a result,
the inductor’s pole frequency is shifted beyond the gain
bandwidth of the regulator. System stability is provided
with the addition of a simple series capacitor-resistor from
COMP to GND. This pole-zero combination serves to tailor
the desired response of the closed-loop system. The basic
regulator loop consists of a power modulator (comprising
the regulator’s pulse-width modulator, current sense and
slope compensation ramps, control circuitry, MOSFETs,
and inductor), the capacitive output filter and load, an
output feedback divider, and a voltage-loop error amplifier
with its associated compensation circuitry. See Figure 1.
The average current through the inductor is expressed as:
I_L = G_MOD × V_COMP
where IL is the average inductor current and GMOD is the
power modulator’s transconductance.
For a buck converter:
V_OUT = R_LOAD × I_L
where RLOAD is the equivalent load resistor value.
Combining the above two relationships, the power mod-
ulator’s transfer function in terms of VOUT with respect
to VCOMP is:
V_OUT
V_COMP
=
R_LOAD
I_L
× I_L
= R_LOAD
× G_MOD
G_MOD
The peak current-mode controller’s modulator gain
is attenuated by the equivalent divider ratio of the
load resistance and the current-loop gain’s impedance.
GMOD becomes:
G_MOD
(DC)
=
g_MC
×

¹⁺

R_LOAD
f_SW × L
×
1
K _S
×
(1−
D)
−

0.5
where RLOAD = VOUT/IOUT(MAX), fSW is the switching
frequency, L is the output inductance, D is the duty cycle
(VOUT/VIN), and KS is a slope compensation factor cal-
culated from the following equation:
K_S
= 1+
S _SLOPE
S_N
= 1+
V_SLOPE × f_SW × L × g_MC
(V_IN − V_OUT )
where:
S _SLOPE
=
V_SLOPE
t _SW
=
V_SLOPE
× f_SW
S_N
=
(V_IN − V_OUT )
L × g_MC
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