MAX15026 Datasheet, PDF (15/23 Pages) Maxim Integrated Products – Low-Cost, Small, 4.5V to 28V Wide Operating Range, DC-DC Synchronous Buck Controller

Low-Cost, Small, 4.5V to 28V Wide Operating
Range, DC-DC Synchronous Buck Controller
requirements. Choose the small-signal components for
the error amplifier to achieve the desired closed-loop
bandwidth and phase margin.
To choose the appropriate compensation network type,
the power-supply poles and zeros, the zero crossover
frequency, and the type of the output capacitor must be
determined.
In a buck converter, the LC filter in the output stage intro-
duces a pair of complex poles at the following frequency:
f_PO = _{2π ×}
1
L_OUT × C_OUT
The output capacitor introduces a zero at:
f_ZO
=
2π
1
× ESR ×
C_OUT
where ESR is the equivalent series resistance of the
output capacitor.
The loop-gain crossover frequency (f_O), where the loop
gain equals 1 (0dB) should be set below 1/10th of the
switching frequency:
f_O
≤
f_SW
10
Choosing a lower crossover frequency reduces the
effects of noise pick-up into the feedback loop, such as
jittery duty cycle.
To maintain a stable system, two stability criteria must
be met:
1) The phase shift at the crossover frequency f_O, must
be less than 180°. In other words, the phase margin
of the loop must be greater than zero.
2) The gain at the frequency where the phase shift is
-180° (gain margin) must be less than 1.
Maintain a phase margin of around 60° to achieve a
robust loop stability and well-behaved transient
response.
When using an electrolytic or large-ESR tantalum output
capacitor the capacitor ESR zero f_ZO typically occurs
between the LC poles and the crossover frequency f_O
(f_PO < f_ZO < f_O). Choose Type II (PI—proportional-inte-
gral) compensation network.
When using a ceramic or low-ESR tantalum output
capacitor, the capacitor ESR zero typically occurs
above the desired crossover frequency f_O, that is f_PO <
f_O < f_ZO. Choose Type III (PID—proportional, integral,
and derivative) compensation network.
Type II Compensation Network
(Figure 3)
If f_ZO is lower than f_O and close to f_PO, the phase lead
of the capacitor ESR zero almost cancels the phase
loss of one of the complex poles of the LC filter around
the crossover frequency. Use a Type II compensation
network with a midband zero and a high-frequency
pole to stabilize the loop. In Figure 3, R_F and C_F intro-
duce a midband zero (f_Z1). R_F and C_CF in the Type II
compensation network provide a high-frequency pole
(f_P1), which mitigates the effects of the output high-fre-
quency ripple.
Follow the instructions below to calculate the component
values for the Type II compensation network in Figure 3:
1) Calculate the gain of the modulator (GAIN_MOD),
comprised of the regulator’s pulse-width modulator,
LC filter, feedback divider, and associated circuitry
at the crossover frequency:
( ) ^GAINMOD
=
V_IN
V_RAMP
×
ESR
2π × f_O × L_OUT
× ^VFB
V_OUT
where V_IN is the input voltage of the regulator, V_RAMP is
the amplitude of the ramp in the pulse-width modulator,
V_FB is the FB input voltage set-point (0.592V typically,
see the Electrical Characteristics table), and V_OUT is
the desired output voltage.
The gain of the error amplifier (Gain_EA) in midband fre-
quencies is:
GAIN_EA = g_M x R_F
where g_M is the transconductance of the error amplifier.
The total loop gain, which is the product of the modula-
tor gain and the error amplifier gain at f_O, is 1.
GAIN_MOD × GAIN_EA = 1
So:
V_IN
V_RAMP
×
ESR
(2π × f_O × L_OUT)
×
V_FB
V_OUT
× g_M
× R_F
=1
Solving for R_F:
( ) _RF
=
V_RAMP × 2π × f_O × L_OUT ×
V_FB × V_IN × g_M × ESR
V_OUT
2) Set a midband zero (f_Z1) at 0.75 x f_PO (to cancel
one of the LC poles):
f_Z1 =
1
2π × R_F
× C_F
= 0.75 × f_PO
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