MAX1036_09 Datasheet, PDF (15/23 Pages) Maxim Integrated Products – 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel 2-Wire Serial 8-Bit ADCs

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,
4-/12-Channel 2-Wire Serial 8-Bit ADCs
Table 2. Configuration Byte Format
BIT 7
(MSB)
REG
BIT 6
SCAN1
BIT 5
SCAN0
BIT 4
CS3
BIT 3
CS2
BIT 2
CS1
BIT 1
CS0
BIT 0
(LSB)
SGL/DIF
BIT
NAME
DESCRIPTION
7
REG
Register bit. 1 = Setup Byte (Table 1), 0 = Configuration Byte.
6
SCAN1
Scan select bits. Two bits select the scanning configuration (Table 5). Default to 00 at
5
SCAN0
power-up.
4
CS3
3
CS2
Channel select bits. Four bits select which analog input channels are to be used for conversion
(Tables 3, 4). Default to 0000 at power-up. For MAX1036/MAX1037, CS3 and CS2 are internally
2
CS1
set to 0.
1
CS0
0
SGL/DIF
1 = single-ended, 0 = pseudo-differential (Tables 3, 4). Default to 1 at power-up (see the Single-
Ended/Pseudo-Differential Input section).
Applications Information
Power-On Reset
The configuration and setup registers (Tables 1 and 2)
default to a single-ended, unipolar, single-channel con-
version on AIN0 using the internal clock with V_DD as the
reference and AIN_/REF configured as an analog input.
The RAM contents are unknown after power-up.
Automatic Shutdown
SEL[2:0] of the setup byte (Tables 1 and 6) controls the
state of the reference and AIN_/REF. If automatic shut-
down is selected (SEL[2:0] = 100), shutdown occurs
between conversions when the MAX1036–MAX1039 are
idle. When operating in external clock mode, a STOP
condition must be issued to place the devices in idle
mode and benefit from automatic shutdown. A STOP
condition is not necessary in internal clock mode to ben-
efit from automatic shutdown because power-down
occurs once all contents are written to memory (Figure
10). All analog circuitry is inactive in shutdown and sup-
ply current is less than 1µA. The digital conversion
results are maintained in RAM during shutdown and are
available for access through the serial interface at any
time prior to a STOP or repeated START condition.
When idle, the MAX1036–MAX1039 wait for a START
condition followed by their slave address (see the
Slave Address section). Upon reading a valid address
byte, the MAX1036–MAX1039 power up. The analog
circuits do not require any wakeup time from shutdown,
whether using external or internal reference.
Automatic shutdown results in dramatic power savings,
particularly at slow conversion rates. For example, at a
conversion rate of 10ksps, the average supply current
for the MAX1036 is 8µA and drops to 2µA at 1ksps.
At 0.1ksps the average supply current is just 1µA (see
Average Supply Current vs. Conversion Rate in the
Typical Operating Characteristics section).
Reference Voltage
SEL[2:0] of the setup byte (Table 1) controls the refer-
ence and the AIN_/REF configuration (Table 6). When
AIN_/REF is configured to be a reference input or refer-
ence output (SEL1 = 1), conversions on AIN_/REF
appear as if AIN_/REF is connected to GND (see Note
2 of Tables 3 and 4).
Internal Reference
The internal reference is 4.096V for the MAX1036/
MAX1038 and 2.048V for the MAX1037/MAX1039. SEL1
of the setup byte controls whether AIN_/REF is used for
an analog input or a reference (Table 6). When
AIN_/REF is configured to be an internal reference out-
put (SEL[2:1] = 11), decouple AIN_/REF to GND with a
0.01µF capacitor. Due to the decoupling capacitor and
the 675Ω reference source impedance, allow 80µs for
the reference to stabilize during initial power-up. Once
powered up, the reference always remains on until
reconfigured. The reference should not be used to sup-
ply current for external circuitry.
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