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MAX16826_15 Datasheet, PDF (14/26 Pages) Maxim Integrated Products – Programmable, Four-String HB LED Driver with Output-Voltage Optimization and Fault Detection
MAX16826
Programmable, Four-String HB
LED Driver with Output-Voltage
Optimization and Fault Detection
Oscillator
The MAX16826 oscillator frequency is programmable
using an external capacitor (C33 in the Typical
Application Circuit) and a resistor (R19) at RTCT. R19 is
connected from RTCT to VCC and C33 is connected
from RTCT to GND. C33 charges through RT until VRTCT
reaches 2.85V. CT then discharges through an 8.4mA
internal current sink until VRTCT drops to 1.2V. C33 is
then allowed to charge through R19 again. The period
of the oscillator is the sum of the charge and discharge
times of C3. Calculate these times as follows:
The charge time is:
tC = 0.55 x R19 x C33
The discharge time is:
tD = R19 × C33 × ln ((R19 − 281.86) (R19 − 487.45))
where tC and tD is in seconds, R19 is in ohms (Ω), and
C33 is in farads (F).
The oscillator frequency is then:
fOSC
=
tC
1
+ tD
The charge time (tC) in relation to the period (tC + tD)
sets the maximum duty cycle of the switching regulator.
Therefore, the charge time (tC) is constrained by the
desired maximum duty cycle. Typically, the duty cycle
should be limited to 95%. The oscillator frequency is
programmable from 100kHz to 1MHz. The MAX16826
can be synchronized to an external oscillator through
SYNC/EN.
Slope Compensation (RSC)
The MAX16826 uses an internal ramp generator for
slope compensation to stabilize the current loop when
the duty cycle exceeds 50%. A slope compensation
resistor (R17 in the Typical Application Circuit) is con-
nected between RSC and the switching current-sense
resistor at the source of the external switching FET.
When the voltage at DL transitions from low to high, a
ramped current with a slope of 26μA/μs is generated
and flows through the slope compensation resistor. It is
effectively summed with the current-sense signal. When
the voltage at DL is low, the current ramp is reset to 0.
Calculate R17 as follows:
R17 = (VOUT − VINMIN) × R12
34.28 × L1
where VOUT is the switching regulator output and
VINMIN is the minimum operating input voltage.
Current Limit (CS)
The MAX16826 includes a primary cycle-by-cycle, cur-
rent-limit comparator and a secondary gross current-
limit comparator to terminate the on-time or switch
cycle during an overload or fault condition. The current-
sense resistor (R12 in the Typical Application Circuit)
connected between the source of the switching FET
and GND and the internal threshold, set the current
limit. The current-sense input (CS) has a voltage trip
level (VCS) of 200mV. Use the following equation to cal-
culate R39:
R12 = VCS/IPK
where IPK is the peak current that flows through the
switching FET. When the voltage across R12 exceeds
the current-limit comparator threshold, the FET driver
(DL) turns the switch off within 80ns. In some cases, a
small RC filter may be required to filter out the leading-
edge spike on the sensed waveform. Set the time con-
stant of the RC filter at approximately 100ns and adjust
as needed.
If, for any reason, the voltage at CS exceeds the 270mV
trip level of the gross current limit as set by a second
comparator, then the switching cycle is immediately
terminated and the soft-start capacitor is discharged.
This allows a new soft-start cycle and prevents inductor
current buildup.
Soft-Start (CSS)
Soft-start is achieved by charging the external soft-start
capacitor (C30 in the Typical Application Circuit) at
startup. An internal fixed 6μA current source charges
the soft-start capacitor until VCSS reaches VCC. To
achieve the required soft-start timing for the switching
regulator output voltage to reach regulation, the value
of the soft-start capacitor at CSS is calculated as:
C30 = 6μA x tSS/VREF
where tSS is the required time to achieve the switching
regulator output regulation and VREF is the set FB regu-
lation voltage. When the IC is disabled, the soft-start
capacitor is discharged to GND.
Synchronization and Enable Input
The SYNC/EN input provides both external clock syn-
chronization (if desired) and enable control. When
SYNC/EN is held low, all circuits are disabled and the
IC enters low-current shutdown mode. When SYNC/EN
is high, the IC is enabled and the switching regulator
clock uses the RTCT network to set the operating fre-
quency. See the Oscillator section for details. The
SYNC/EN can also be used for frequency synchroniza-
tion by connecting it to an external clock signal from
100kHz to 1MHz. The switching cycle initiates on the
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