MAX1478 Datasheet, PDF (14/20 Pages) Maxim Integrated Products – 1% Accurate, Digitally Trimmed,Rail-to-Rail Sensor Signal Conditioner

1% Accurate, Digitally Trimmed,
Rail-to-Rail Sensor Signal Conditioner
coarse offset TC adjustment is required, use the follow-
ing equation:
( ) ^{4096 ⋅ ∆V}OUT ^T
( ) ^{OFFTC COEF =}
⋅ ∆V_BDRIVE T 2.3
( ) ^{4096 OTC ⋅ FSO ⋅ ∆T}
≅ _{TCS ⋅ VBDRIVE ⋅ 2.3 ⋅ ∆T}
( ) ^{4096 -1000ppm/°C ⋅ 4V}
= _{-2100ppm/°C ⋅ 2.5V ⋅ 2.3} = 1357
where OTC is the sensor offset TC error as a ppm/°C of
OUTFSO (Table 6), ∆T is the operating temperature
range in °C, and OFFTC COEF is the numerical decimal
value to be loaded into the DAC. For positive values,
set the OFFTC sign bit high; for negative values, set the
OFFTC sign bit low. If the absolute value of the OFFTC
COEF is larger than 4096, the sensor has a very large
offset TC error that the MAX1478 is unable to completely
correct.
FSO Calibration
Perform FSO calibration at room temperature with a full-
scale sensor excitation.
1) Set FSOTC COEF to 1000.
2) At T1, adjust FSO DAC until V_BDRIVE is about 2.5V.
3) Adjust Offset DAC (and OFFSET sign bit, if needed)
until the T1 offset voltage is 0.5V (see OFFSET
Calibration section).
4) Measure the full-span output (measuredV_FSO).
5) Calculate the ideal bridge voltage, V_BIDEAL(T1),
using the following equation:
( ) ^{⋅ V}BIDEAL ^{T1 = V}BDRIVE

( ) ^desiredVFSO ^{- measuredV}FSO ^{T1 }
_{1 +}

( ) ^measuredVFSO ^T1


Note: If V_BIDEAL(T1) is outside the allowable bridge
voltage swing of (V_SS + 1.3V) to (V_DD - 1.3V), readjust
the PGA gain setting. If V_BIDEAL(T1) is too low,
decrease the PGA gain setting by one step and return
to Step 2. If V_BIDEAL(T1) is too high, increase the PGA
gain setting by one step and return to Step 2.
6) Set V_BIDEAL(T1) by adjusting the FSO DAC.
7) Readjust Offset DAC until the offset voltage is 0.5V
(see OFFSET Calibration section).
Three-Step FSOTC Compensation
Step 1
Use the following procedure to determine FSOTC
COEF; four variables, A–D, will be used:
1) Name the existing FSO DAC coefficient A.
2) Change FSOTC DAC to 3000.
3) Adjust FSO DAC until V_BDRIVE (T1) is equal to
V_BIDEAL(T1).
4) Name the existing FSO DAC coefficient B.
5) Readjust the offset voltage (by adjusting the Offset
DAC), if required, to 0.5V.
At this point, it is important that no other changes be
made to the Offset or Offset TC DACs until the Offset
TC Compensation step has been completed.
Step 2
To complete linear FSOTC compensation, take data
measurements at a second temperature, T2 (T2 > T1).
Perform the following steps:
1) Measure the full-span output (measuredV_FSO(T2)).
2) Calculate V_BIDEAL(T2) using the following equation:
( ) ^{⋅ V}BIDEAL ^{T2 = V}BDRIVE

( ) ^{( )} _{}^{1 +}
desiredV_FSO - measuredV_FSO T2 ^
measuredV_FSO T2

3) Set V_BIDEAL(T2) by adjusting the FSO DAC.
4) Name the current FSO DAC coefficient D.
5) Change FSOTC DAC to 1000.
6) Adjust FSO DAC until V_BDRIVE is equal to
V_BIDEAL(T2).
7) Name the FSO DAC coefficient C.
Step 3
Insert the data previously obtained from Steps 1 and 2
into the following equation to calculate FSOTC COEF:
1000₍B - D₎ + 3000₍C - A₎
FSOTC COEF =
(^{B - D}) ⁺ (^{C - A})
1) Load this FSOTC COEF value into the FSOTC DAC.
2) Adjust the FSO DAC until V_BDRIVE(T2) is equal to
V_BIDEAL(T2).
This completes both FSO calibration and FSO TC com-
pensation.
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