DS33Z41 Datasheet, PDF (133/167 Pages) Maxim Integrated Products – Quad IMUX Ethernet Mapper

DS33Z41 Quad IMUX Ethernet Mapper
Register Name:
Register Description:
Register Address:
SU.RxFrmCtr
MAC All Frames Received Counter
0200h (indirect)
0200h:
Bit #
Name
Default
31
RXFRMC31
0
30
RXFRMC30
0
29
RXFRMC29
0
28
RXFRMC28
0
27
RXFRMC27
0
26
RXFRMC26
0
25
RXFRMC25
0
24
RXFRMC24
0
0201h:
Bit #
Name
Default
23
RXFRMC23
0
22
RXFRMC22
0
21
RXFRMC21
0
20
RXFRMC20
0
19
RXFRMC19
0
18
RXFRMC18
0
17
RXFRMC17
0
16
RXFRMC16
0
0202h:
Bit #
Name
Default
15
RXFRMC15
0
14
RXFRMC14
0
13
RXFRMC13
0
12
RXFRMC12
0
11
RXFRMC11
0
10
RXFRMC10
0
09
RXFRMC9
0
08
RXFRMC8
0
0203h:
Bit #
Name
Default
07
RXFRMC7
0
06
RXFRMC6
0
05
RXFRMC5
0
04
RXFRMC4
0
03
RXFRMC3
0
02
RXFRMC2
0
01
RXFRMC1
0
00
RXFRMC0
0
Bits 31 to 0: All Frames Received Counter (RXFRMC31 to RXFRMC0). 32-bit value indicating the number of
frames received. Each time a frame is received, this counter is incremented by 1. This counter resets only upon
device reset, does not saturate, and rolls over to zero upon reaching the maximum value. The user should ensure
that the measurement period is less than the minimum length of time required for the counter to increment 2^32-1
times at the maximum frame rate. The user should store the value from the beginning of the measurement period
for later calculations, and take into account the possibility of a rollover occurring.
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