MAX15041_10 Datasheet, PDF (13/18 Pages) Maxim Integrated Products – Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM Step-Down DC-DC Regulator with Internal Switches

Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM
Step-Down DC-DC Regulator with Internal Switches
FEEDBACK
DIVIDER
V_OUT
ERROR AMPLIFIER
POWER MODULATOR
COMPENSATION
RAMP
V_IN
OUTPUT FILTER
AND LOAD
R₁
FB
Σ
g_MC
COMP
CONTROL
R₂
LOGIC
PWM
COMPARATOR
g_MV
R_OUT
R_C
*C_CC
Q_HS
L0
DCR
Q_LS
I_L
C_C
V_{COMP GMOD}
V_OUT
R_OUT = A_VEA/g_MV
REF
*C_CC IS OPTIONAL.
I_L
NOTE: THE G_MOD STAGE SHOWN ABOVE MODELS THE AVERAGE CURRENT OF
THE INDUCTOR INJECTED INTO THE OUTPUT LOAD. THIS REPRESENTS A
SIMPLIFICATION FOR THE POWER MODULATOR STAGE DRAWN ABOVE.
Figure 1. Peak Current-Mode Regulator Transfer Model
V_OUT
ESR
C_OUT
R_LOAD
Having defined the power modulator’s transfer function
gain, the total system loop gain can be written as fol-
lows (see Figure 1):
α
=
⎡⎣s (C_C
+
C_CC
)(R_C
R_OUT × (sC_CR_C + 1)
+ R_OUT ) + 1⎤⎦ × ⎡⎣s(C_C || C_CC
)(R_C
||
R_OUT
)
+ 1⎤⎦
β = G_MOD ×
R_LOAD
×
(sC_OUTESR + 1)
⎡⎣sC_OUT (ESR + R_LOAD
)
+
1⎤⎦
Gain = ^R2 × ^AVEA × α × β
R₁ + R₂ R_OUT
where R_OUT is the quotient of the error amplifier’s DC
gain, A_VEA, divided by the error amplifier’s transcon-
ductance, g_MV; R_OUT is much larger than R_C and C_C is
much larger than C_CC.
Rewriting:
Gain
=
V_FB
V_OUT
A_VEA
×
⎡
⎢^sCC
⎣
⎛
⎝⎜
(sC_CR_C + 1)
A_VEA
g_MV
⎞
⎠⎟
+
⎤
1_⎥
⎦
×
(sC_CCR_C
+ 1)
×
G_MODR_LOAD
×
(sC_OUTESR + 1)
⎡⎣sC_OUT (ESR + R_LOAD
)
+ 1⎤⎦
The dominate poles and zeros of the transfer loop gain
is shown below:
f_P1
=
2π
g_MV
× 10^{AVEA [dB]/ 20}
×
C_C
f_P2
=
2π
×
C_OUT
1
(ESR + R_LOAD )
f_P3
=
2π
1
× C_CCR_C
f_Z1
=
2π
×
1
C_CR_C
f_Z2
=
2π
×
1
C_OUTESR
The order of pole-zero occurrence is:
f_P1 < f_P2 < f_Z1 < f_Z2 ≤ f_P3
Note under heavy load, f_P2, may approach f_Z1.
A graphical representation of the asymptotic system
closed-loop response, including the dominant pole and
zero locations is shown in Figure 2.
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