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MAX15039 Datasheet, PDF (13/18 Pages) Maxim Integrated Products – 6A, 2MHz Step-Down Regulator with Integrated Switches
6A, 2MHz Step-Down Regulator
with Integrated Switches
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high imped-
ance when VFB is above 0.925 x VREFIN and VREFIN is
above 0.54V for at least 48 clock cycles. PWRGD pulls
low when VFB is below 90% of VREFIN or VREFIN is
below 0.54V for at least 48 clock cycles. PWRGD is low
when the IC is in shutdown mode, VDD is below the
internal UVLO threshold, or the IC is in thermal shut-
down mode.
Programming the Output Voltage
(CTL1, CTL2)
As shown in Table 1, the output voltage is pin program-
mable by the logic states of CTL1 and CTL2. CTL1 and
CTL2 are trilevel inputs: VDD, unconnected, and GND.
An 8.06kΩ resistor must be connected between OUT
and FB when CTL1 and CTL2 are connected to GND.
The logic states of CTL1 and CTL2 should be pro-
grammed only before power-up. Once the part is
enabled, CTL1 and CTL2 should not be changed. If the
output voltage needs to be reprogrammed, cycle
power or EN and reprogram before enabling. The out-
put voltage can be programmed continuously from
0.6V to 90% of VIN by using a resistor-divider network
from VOUT to FB to GND as shown in Figure 3a. CTL1
and CTL2 must be connected to GND.
Shutdown Mode
Drive EN to GND to shut down the IC and reduce quies-
cent current to 10µA (typ). During shutdown, the LX is
high impedance. Drive EN high to enable the MAX15039.
Thermal Protection
Thermal-overload protection limits total power dissipation
in the device. When the junction temperature exceeds
TJ = +165°C, a thermal sensor forces the device into
shutdown, allowing the die to cool. The thermal sensor
turns the device on again after the junction temperature
cools by 20°C, causing a pulsed output during continu-
ous overload conditions. The soft-start sequence begins
after recovery from a thermal-shutdown condition.
Applications Information
IN and VDD Decoupling
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of
the MAX15039, decouple VIN with a 22µF capacitor
from VIN to PGND. Also decouple VDD with a 2.2µF low-
ESR ceramic capacitor from VDD to GND. Place these
capacitors as close as possible to the IC.
Table 1. CTL1 and CTL2 Output Voltage
Selection
CTL1
GND
VDD
GND
GND
Unconnected
Unconnected
Unconnected
VDD
VDD
CTL2
GND
VDD
Unconnected
VDD
GND
Unconnected
VDD
GND
Unconnected
VOUT (V)
0.6
0.7
0.8
1.0
1.2
1.5
1.8
2.0
2.5
LX
MAX15039
OUT
CTL1
FB
CTL2
COMP
LX
MAX15039
OUT
VOLTAGE
SELECT
R3
8kΩ
FB
CTL1
COMP
CTL2
L
VOUT
COUT
R2
R3
C3
R1 C1
R4
C2
a) EXTERNAL RESISTIVE DIVIDER
L
VOUT
COUT
R2
C3
R1 C1
C2
b) INTERNAL PRESET VOLTAGES
Figure 3. Type III Compensation Network
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