MAX14782E_14 Datasheet, PDF (13/17 Pages) Maxim Integrated Products – 500Kbps 3.3V to 5V RS-485/RS-422 Transceiver with ±35kV HBM ESD Protection

MAX14782E
500Kbps 3.3V to 5V RS-485/RS-422 Transceiver
with ±35kV HBM ESD Protection
Detailed Description
The MAX14782E is a 3.3V to 5V ESD-protected RS-485/
RS-422 transceiver intended for high-speed, half-duplex
communications. Integrated hot-swap functionality elimi-
nates false transitions on the bus during power-up or hot
insertion.
The device features fail-safe receiver inputs guaranteeing
a logic-high receiver output when inputs are shorted or
open. The IC has a 1-unit load receiver input impedance,
allowing up to 32 transceivers on the bus.
True Fail Safe
The MAX14782E guarantees a logic-high receiver output
when the receiver inputs are shorted or open, or when
they are connected to a terminated transmission line with
all drivers disabled. If the differential receiver input voltage
(A–B) is greater than or equal to -10mV, RO is logic-high.
Driver Single-Ended Operation
The A and B outputs can either be used in the standard
differential operating mode, or can be used as single-
ended outputs. Since the A and B driver outputs swing
rail-to-rail, they can individually be used as standard TTL
logic outputs.
Hot-Swap Capability
Hot-Swap Inputs
When circuit boards are inserted in a hot or powered
backplane, disturbances on the enable inputs and dif-
ferential receiver inputs can lead to data errors. Upon
initial circuit board insertion, the processor undergoes its
power-up sequence. During this period, the processor
output drivers are high impedance and are unable to drive
the DE and RE inputs of the MAX14782E to a defined
logic level. Leakage currents up to 10µA from the high-
impedance outputs of a controller could cause DE and RE
to drift to an incorrect logic state. Additionally, parasitic
circuit board capacitance could cause coupling of V_CC
or GND to DE and RE. These factors could improperly
enable the driver or receiver. The MAX14782E features
integrated hot-swap inputs that help to avoid these poten-
tial problems.
When V_CC rises, an internal pulldown circuit holds DE
low and RE high. After the initial power-up sequence, the
pulldown circuit becomes transparent, resetting the hot-
swap-tolerable inputs.
Hot-Swap Input Circuitry
The DE and RE enable inputs feature hot-swap capabil-
ity. At the input, there are two nMOS devices, M1 and M2
(Figure 9). When V_CC ramps from 0V, an internal 10µs
timer turns on M2 and sets the SR latch that also turns
VCC
10µs
TIMER
TIMER
5kΩ (typ)
DE
100µA
M1
500µA
M2
Figure 9. Simplified Structure of the Driver Enable (DE) Pin
www.maximintegrated.com
DRIVER
ENABLE
(HOT SWAP)
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