MAX11044 Datasheet, PDF (13/19 Pages) Maxim Integrated Products – 4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs

4-/6-/8-Channel, 16-Bit,
Simultaneous-Sampling ADCs
External Reference
Set the configuration register to disable the internal ref-
erence and drive REFIO with a high-quality external ref-
erence. To avoid signal degradation, ensure that the
integrated reference noise applied to REFIO is less
than 10µV in the bandwidth of up to 50kHz.
Reference Buffer
The MAX11044/MAX11045/MAX11046 have a built-in
reference buffer to provide a low-impedance reference
source to the SAR converters. This buffer is used in
both internal and external reference mode. The refer-
ence buffer output feeds five RDC pins. The RDC pins
should be all connected together on the PCB. The ref-
erence buffer is externally compensated and requires
at least 10µF on the RDC node. For best performance,
provide a total of at least 80µF on the RDC outputs.
Transfer Functions
Figures 8 and 9 show the transfer functions for all the
formats and devices. Code transitions occur halfway
between successive-integer LSB values.
Layout, Grounding, and Bypassing
For best performance use PCBs with ground planes.
Ensure that digital and analog signal lines are separated
from each other. Do not run analog and digital lines paral-
lel to one another (especially clock lines), and avoid run-
ning digital lines underneath the ADC package. A single
solid GND plane configuration with digital signals routed
from one direction and analog signals from the other pro-
vides the best performance. Connect DGND, AGND, and
AGNDS pins on the MAX11044/MAX11045/MAX11046 to
this ground plane. Keep the ground return to the power
supply for this ground low impedance and as short as
possible for noise-free operation.
To achieve the highest performance, connect all the
RDC pins (22, 28, 36, 43, and 49) to a local RDC plane
on the PCB. A total of at least 80µF of capacitance
should be placed on this RDC plane. If two capacitors
are used, place each as close as possible to pins 22
and 49. If four capacitors are used, place each as
close as possible to pins 22, 28, 43, and 49. For exam-
ple, two 47µF, 10V X5R capacitors in 1210 case size
can be placed as close as possible to pins 22 and 49
will provide excellent performance. Alternatively, four
22µF, 10V X5R capacitors in 1210 case size placed as
close as possible to pins 22, 28, 43, and 49 will also
provide good performance. Ensure that each capacitor
is connected directly into the GND plane with an inde-
pendent via.
If Y5U or Z5U ceramics are used, be aware of the high-
voltage coefficient these capacitors exhibit and select
higher voltage rating capacitors to ensure that at least
80µF of capacitance is on the RDC plane when the
plane is driven to 4.096V by the built-in reference
buffer. For example, a 22µF X5R with a 10V rating is
approximately 20µF at 4.096V, whereas, the same
capacitor in Y5U ceramic is just 13µF. However, a Y5U
22µF capacitor with a 25V rating cap is approximately
20µF at 4.096V.
CS
(USER SUPPLIED)
t₅
t₃
t₄
WR
(USER SUPPLIED)
t₇
t₆
D0–D15
(USER SUPPLIED)
CONFIGURATION
REGISTER
Figure 4. Programming Configuration-Register Timing
Requirements
CS
(USER SUPPLIED)
RD
(USER SUPPLIED)
D0–D15
t₈
t₉
t₁₀
t₁₁
t₁₂
t₁₃
S_n
S_{n + 1}
Figure 5. Readout Timing Requirements
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