DS1500_11 Datasheet, PDF (13/20 Pages) Maxim Integrated Products – Y2K Watchdog RTC with Nonvolatile Control

DS1500 Y2KC Watchdog RTC with Nonvolatile Control
SETTING THE CLOCK
It is recommended to halt updates to the external set of double buffered RTC registers when writing to the clock.
The (TE) bit should be used as described above before loading the RTC registers with the desired RTC count (day,
date, and time) in 24-hour BCD format. Setting the (TE) bit to 1 transfers the new values written to the internal RTC
registers and allows normal operation to resume.
CLOCK ACCURACY
A standard 32.768kHz quartz crystal should be directly connected to the DS1500 X1 and X2 oscillator pins. The
crystal selected for use should have a specified load capacitance (C_L) of either 6pF or 12.5pF, and the crystal
select (CS) bit set accordingly. For more information about crystal selection and crystal layout considerations, refer
to Application Note 58: Crystal Considerations with Maxim Real-Time Clocks (RTCs). An external 32.768kHz
oscillator can also drive the DS1500. To achieve low-power operation when using an external oscillator, it may be
necessary to connect the X1 pin to the external oscillator signal through a series connection consisting of a resistor
and a capacitor. A typical configuration consists of a 1.0M resistor in series with a 100pF ceramic capacitor. When
using an external oscillator the X2 pin must be left open.
Table 2. Register Map
ADDRESS
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h-1Fh
B7
0
0
0
0
0
EOSC
AM1
AM2
AM3
AM4
BLF1
TE
DATA
B6
B5
B4
B3
B2
B1
10 Seconds
Seconds
10 Minutes
0
10 Hours
0
0
0
0
Minutes
Hour
Day
0
10 Date
E32K BB32 10 MO
Date
Month
10 YEAR
Year
10 CENTURY
Century
10 Seconds
10 Minutes
Seconds
Minutes
0
10 Hours
Dy/Dt
10 Date
0.1 Second
Hour
Day/Date
0.01 Second
10 Second
Second
BLF2 PRS
PAB TDF KSF WDF
CS
BME
TPE
TIE
KIE WDE
Extended RAM Address
Reserved
Reserved
Extended RAM Data
Reserved
0 = “0” and are read only.
B0
IRQF
WDS
FUNCTION
Seconds
Minutes
Hours
Day
Date
Month
Year
Century
Alarm Seconds
Alarm Minutes
Alarm Hours
Alarm Day/Date
Watchdog
Watchdog
Control A
Control B
RAM Address LSB
RAM Data
BCD
RANGE
00–59
00–59
00–23
1–7
01–31
01–12
00–99
00–39
00–59
00–59
00–23
1–7/1–31
00–99
00–99
00–FF
00–FF
POWER-UP DEFAULT STATES
These bits are set upon power-up: EOSC = 0, E32K = 0, TIE = 0, KIE = 0, WDE = 0, and WDS = 0.
Note: Unless otherwise specified, the state of the control/RTC/SRAM bits in the DS1500 is not defined upon initial
power application; the DS1500 should be properly configured/defined during initial configuration.
USING THE CLOCK ALARM
The alarm settings and control reside within registers 08h to 0Bh (Table 2). The TIE bit and alarm mask bits AM1 to
AM4 must be set as described below for the IRQ or PWR outputs to be activated for a matched alarm condition.
The alarm functions as long as at least one supply is at a valid level. Note that activating the PWR pin requires the
use of V_BAUX.
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