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MAX1473_12 Datasheet, PDF (12/16 Pages) Maxim Integrated Products – 315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic Range | |||
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315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Peak Detector
The peak detector output (PDOUT), in conjunction with
an external RC filter, creates a DC output voltage equal
to the peak value of the data signal. The resistor pro-
vides a path for the capacitor to discharge, allowing the
peak detector to dynamically follow peak changes of
the data filter output voltage. For faster receiver startup,
the circuit shown in Figure 4 can be used.
Layout Considerations
A properly designed PCB is an essential part of any
RF/microwave circuit. On high-frequency inputs and
outputs, use controlled-impedance lines and keep
them as short as possible to minimize losses and radia-
tion. At high frequencies, trace lengths that are on the
order of λ/10 or longer act as antennas.
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of a PCB trace adds about 20nH
of parasitic inductance. The parasitic inductance can
have a dramatic effect on the effective inductance of a
passive component. For example, a 0.5in trace con-
necting a 100nH inductor adds an extra 10nH of induc-
tance or 10%.
To reduce the parasitic inductance, use wider traces
and a solid ground or power plane below the signal
traces. Also, use low-inductance connections to ground
on all GND pins, and place decoupling capacitors
close to all power-supply pins.
MAX1473
DATA
SLICER
25
DATAOUT
20
23 19
DSN
DSP DFO
25kâ¦
47nF
26
PDOUT
Figure 4. Using PDOUT for Faster Startup
Control Interface Considerations
When operating the MAX1473 with a +4.5V to +5.5V
supply voltage, the PWRDN and AGCDIS pins may be
driven by a microcontroller with either 3V or 5V inter-
face logic levels. When operating the MAX1473 with a
+3.0V to +3.6V supply, the microcontroller must pro-
duce logic levels which conform to the VIH and VIL
specifications in the DC Electrical Characteristics Table
for the MAX1473.
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