MAX13037 Datasheet, PDF (12/22 Pages) Maxim Integrated Products – Automotive Contact Monitor and Level Shifters with LDO Regulator

Automotive Contact Monitor and
Level Shifters with LDO Regulator
BAT
BAT is the main power-supply input. Bypass BAT to
ground with a 0.1µF ceramic capacitor placed as close
as possible to BAT. In addition, bypass BAT with a
10µF or greater capacitor. BAT can withstand DC volt-
ages up to +42V.
Low-Dropout Linear Regulator (V_LO)
The MAX13037/MAX13038 contain an internal LDO lin-
ear regulator supplied by the BAT input. The LDO out-
put voltage is present on V_LO and is capable of
supplying up to 150mA of current. The MAX13037 out-
put voltage is set to +5V and the MAX13038 output
voltage is set to +3.3V.
The LDO regulator is controlled through the REGON
and REGOFF inputs as shown in Figure 4. REGON is
an input able to withstand voltages up to V_BAT. The
LDO startup time is 1ms (typ).
There are two options for controlling the linear regulator:
• Wake-Up on Interrupt: In this case, REGON is con-
nected to INT and when the MAX13037/MAX13038
generate an interrupt, the linear regulator is turned
on, thus providing power to the local µCs. The µC
pulls REGOFF high to keep the regulator on before
making an SPI read (which causes INT and REGON
to go high). The linear regulator can then be turned
off by pulling REGOFF low.
• Direct Control: In this case, the regulator is
enabled/disabled by some other signal in the sys-
tem which must be connected to REGON. If
REGOFF is not used, it must be connected to GND
to allow the turnoff of the LDO.
LDO ON
REGON = 0
REGOFF = 0
REGOFF = 1
REGOFF = 0
LDO ON
REGON = 0
REGOFF = 1
REGON = 1
REGON = 0
REGON = 0
REGON = 1
LDO OFF
REGON = 1
REGOFF = 0
REGOFF = 0
LDO ON
REGON = 1
REGOFF = 1
REGOFF = 1 IS NOT ALLOWED
BECAUSE V_LO IS ABSENT.
Figure 4. Linear Regulator State Diagram
Linear Regulator Wake-Up
Regulator wake-up can be controlled with the INT out-
put by connecting it to REGON. REGON is a TTL input
with an internal pullup to a low-voltage internal refer-
ence of +4.8V (typ). With this control scheme, any
change of the input switches (enabled for interrupt gen-
eration) causes the regulator to turn on, thus providing
power to any external circuitry connected to V_LO. If an
external microcontroller is supplied from V_LO, the
microcontroller can keep the LDO on by forcing
REGOFF high. Reading from the MAX13037/MAX13038
over the SPI interface causes the INT output to go into
high-impedance so that both INT and REGON are
pulled high. After this phase, the microcontroller can
turn off the regulator again by driving REGOFF low.
Note that it is also possible to tie multiple open-drain
active-low outputs in an ORing configuration, allowing
the wakeup of the regulator from other devices.
If the INT output is not used to control the regulator,
connect the REGOFF input to ground and use REGON
to enable or disable the regulator as shown in Figure 4.
Watchdog Timer (WDI)
The MAX13037/MAX13038 feature a watchdog timer
that is reset on every transition on the WDI input. If
there is no transition on WDI before the first timeout
period (t_WD1) the INT output asserts low. If there is still
no transition on WDI after the second timeout period
(t_WD2), the RST output is pulsed low for t_RST and the
INT output deasserts (see Figure 3). The watchdog
timeout period can be adjusted by changing the
capacitor value on the TD input.
t_RST (ms) = 2 x C_TD (nF)
t_WD1 = 4 x t_RST (ms)
t_WD2 = 8 x t_RST (ms)
Note that WDI can be tied to the CS input to allow a
watchdog reset for every read/write operation over the
SPI interface. To avoid any corruption of the internal
command register, it is necessary to transmit the full pro-
gramming word (16 bits) for every CS negative pulse.
Reset Output (RST)
The RST output asserts low when a watchdog timeout
occurs or when the LDO output voltage drops below a
certain threshold. The threshold voltage is set by con-
necting an external voltage divider on the THRESH
input between V_LO and GND. The voltage on THRESH
is compared with an internal reference voltage of
+1.24V and if it is lower, the RST output asserts low
for t_RST and remains low if V_LO does not rise above
the threshold.
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