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MAX1062_09 Datasheet, PDF (12/18 Pages) Maxim Integrated Products – 14-Bit, +5V, 200ksps ADC with 10μA Shutdown
14-Bit, +5V, 200ksps ADC with 10µA Shutdown
format. Observe the SCLK to DOUT valid timing
characteristic. Clock data into the µP on SCLK’s ris-
ing edge.
3) Pull CS high at or after the 24th falling clock edge. If
CS remains low, trailing zeros are clocked out after
the 2 sub-bits, S1 and S0.
4) With CS high, wait at least 50ns (tCSW) before start-
ing a new conversion by pulling CS low. A conver-
sion can be aborted by pulling CS high before the
conversion ends. Wait at least 50ns before starting a
new conversion.
Data can be output in three 8-bit sequences or continu-
ously. The bytes contain the results of the conversion
padded with eight leading zeros before the MSB. If the
serial clock has not been idled after the sub-bits (S1
and S0) and CS has been kept low, DOUT sends trail-
ing zeros.
SPI and MICROWIRE Interfaces
When using the SPI (Figure 10a) or MICROWIRE
(Figure 10b) interfaces, set CPOL = 0 and CPHA = 0.
Conversion begins with a falling edge on CS (Figure
10c). Three consecutive 8-bit readings are necessary
to obtain the entire 14-bit result from the ADC. DOUT
data transitions on the serial clock’s falling edge. The
first 8-bit data stream contains all leading zeros. The
second 8-bit data stream contains the MSB through D6.
The third 8-bit data stream contains D5 through D0 fol-
lowed by S1 and S0.
QSPI Interface
Using the high-speed QSPI interface with CPOL = 0
and CPHA = 0, the MAX1062 supports a maximum
fSCLK of 4.8MHz. Figure 11a shows the MAX1062 con-
nected to a QSPI master and Figure 11b shows the
associated interface timing.
I/O
SCK
MISO
SPI
VDD
SS
Figure 10a. SPI Connections
CS
SCLK
DOUT
MAX1062
I/O
SK
SI
MICROWIRE
CS
SCLK
DOUT
MAX1067
MAX1068
Figure 10b. MICROWIRE Connections
SCLK
CS
1ST BYTE READ
1
4
6
8
2ND BYTE READ
12
16
DOUT*
0
0
000
*WHEN CS IS HIGH, DOUT = HIGH-Z
000
3RD BYTE READ
20
D13 D12 D11 D10 D9 D8 D7
MSB
D6 D5
24
D5 D4 D3 D2 D1 D0 S1 S0
LSB
HIGH-Z
Figure 10c. SPI/MICROWIRE Interface Timing Sequence (CPOL = CPHA =0)
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