MAX16016_0812 Datasheet, PDF (11/21 Pages) Maxim Integrated Products – Low-Power μP Supervisory Circuits with Battery-Backup Circuit and Chip-Enable Gating

Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
Pin Description—MAX16020/MAX16021 (continued)
PIN
MAX16020 MAX16021
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
—
—
NAME
WDO
PFO
GND
RESET
OUT
CEOUT
CEIN
V_CC
EP
FUNCTION
Active-Low Watchdog Output. WDO asserts when WDI remains high or low longer than the
watchdog timeout period. WDO returns high on the next WDI transition or when a reset is
asserted.
Active-Low Power-Fail Comparator Output. PFO goes low when V_PFI falls below the internal
0.6V V_PFT threshold and goes high when V_PFI rises above V_PFT + V_PFT-HYS hysteresis.
Ground
Active-Low Reset Output. RESET asserts when V_CC falls below the reset threshold or MR is
pulled low. RESET remains low for the duration of the reset timeout period after V_CC rises
above the reset threshold and MR goes high.
Switched Output. OUT is connected to V_CC when the reset output is not asserted or when
V_CC is greater than V_BATT. OUT connects to BATT when RESET is asserted and V_BATT is
greater than V_CC. Bypass OUT to GND with a 0.1µF (min) capacitor.
Active-Low Chip-Enable Output. CEOUT goes low only when CEIN is low and reset is not
asserted. If CEIN is low when reset is asserted, CEOUT stays low for 12µs (typ) or until
CEIN goes high, whichever occurs first.
Chip-Enable Input. The input to CE gating circuitry. Connect to GND or OUT if not used.
Supply Voltage Input. Bypass V_CC to GND with a 0.1µF capacitor.
Exposed Pad. Internally connected to GND. Connect EP to a large ground plane to aid
heat dissipation. Do not use EP as the only ground connection for the device.
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