MAX14842 Datasheet, PDF (11/13 Pages) Maxim Integrated Products – 6-Channel, Digital Ground-Level Translator

6-Channel, Digital Ground-Level Translator
INA1
INA2
OUTA1
OUTA2
I/OA1
I/OA2
Functional Diagram
VDDA
VDDB
MAX14842
GROUND
REFERENCE
SHIFTER
OUTB1
OUTB2
INB1
INB2
I/OB1
I/OB2
GNDA
GNDB
Detailed Description
The MAX14842 provides both ground-level transla-
tion and logic-level shifting needed in systems where
there is a difference in ground references of up to 72V.
The device is powered by two supply voltages, VDDA
and VDDB, which independently set the logic levels on
either side of the device. VDDA and VDDB are sepa-
rately referenced to GNDA and GNDB, respectively. The
MAX14842 supports data rates of up to 30Mbps on each
of the four unidirectional channels and 2Mbps on the two
bidirectional channels.
Ground Translation/Level Shifting
For proper operation, ensure that 0V P (VGNDB - VGNDA)
P 72V. Note that GNDB must be greater than or equal to
GNDA.
Also ensure that 3.0V P (VDDA - VGNDA) P 5.5V and
3.0V P (VDDB - VGNDB) P 5.5V. (VDDA - VGNDA) can be
greater than or less than (VDDB - VGNDB), as long as
each is within the normal operating range.
Unidirectional Channels
The device features four unidirectional channels that can
each operate independently with a guaranteed data rate
of up to 30Mbps. The output driver of each unidirectional
channel is push-pull, eliminating the need for pullup
resistors. The drivers are also able to drive both TTL and
CMOS logic inputs.
Bidirectional Channels
The device features two bidirectional translation chan-
nels that have open-drain outputs. The bidirectional
channels do not require a direction input. A logic-low on
one side causes the corresponding pin on the other side
to be pulled low while avoiding data latching within the
translator. To prevent latching of the bidirectional chan-
nels, the input logic-low threshold (VIT) of I/OA1 and I/
OA2 is at least 50mV lower than the output logic-low volt-
ages (VOL) of I/OA1 and I/OA2. This prevents an output
logic-low on side A from being accepted as an input low
and subsequently transmitted to side B and vice versa.
The I/OA1, I/OA2, I/OB1, and I/OB2 pins have open-drain
outputs, requiring pullup resistors to their respective sup-
plies for logic-high outputs. The output low voltages are
guaranteed for sink currents of up to 30mA for side B and
10mA for side A (see the Electrical Characteristics table).
The bidirectional channels of the device support I²C
clock stretching.
Separate Ground References
The device is designed to translate logic signals to and
from domains with isolated and offset ground references.
Startup and Undervoltage Lockout
The VDDA and VDDB supplies are both internally moni-
tored for undervoltage conditions. Undervoltage events
can occur during power-up, power-down, or during
normal operation due to a slump in the supplies. When
an undervoltage event occurs on either of the supplies,
all outputs on both sides are automatically controlled,
regardless of the status of the inputs. The bidirectional
outputs become high impedance and are pulled high by
the external pullup resistor on the open-drain output. The
unidirectional outputs are pulled high internally to the
voltage of the VDDA or VDDB supply during undervoltage
conditions.
11