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MAX14759 Datasheet, PDF (11/16 Pages) Maxim Integrated Products – Above- and Below-the-Rails Low On-Resistance Analog Switches
MAX14759/MAX14761/MAX14763
Above- and Below-the-Rails
Low On-Resistance Analog Switches
Pin Description (continued)
PIN
MAX14759 MAX14761 MAX14763
—
3
—
—
6
5
—
5
—
—
10
—
—
9
—
—
—
8
—
—
—
NAME
FUNCTION
B1 Analog Switch 1 Common Terminal
A2 Analog Switch 2 Normally Open Terminal
B2 Analog Switch 2 Common Terminal
Switch 1 Control Input. Drive EN1 high to open switch 1 or drive EN1 low to
EN1 close switch 1.
EN2
Switch 2 Control Input. Drive EN2 high to close switch 2 or drive EN2 low to
open switch 2.
SEL Switch Control Input. Drive SEL low to connect the COM terminal to A1 or drive
SEL high to connect the COM terminal to A2.
EP
Exposed Pad. Connect EP to VN. EP is not intended as an electrical
connection.
Detailed Description
The MAX14759/MAX14761/MAX14763 are analog switches
capable of handling signals above and below their rails.
These devices operate from a single +3.0V to +5.5V sup-
ply and support signals in the -25V to +25V range. The
low on-resistance and high bandwidth allow for use in
digital- and analog-signal switching applications.
Integrated Bias Generation
The MAX14759/MAX14761/MAX14763 contain a total of
three charge pumps to generate bias voltages for the
internal switches: a 5V regulated charge pump, a posi-
tive high-voltage (+35V) charge pump, and a negative
high-voltage (-27V) charge pump. When VDD is above
4.7V (typ), the 5V regulated charge pump is bypassed,
and VDD provides the input for the high-voltage charge
pumps, reducing overall supply current. An external
0.1µF capacitor is required for each high-voltage charge
pump between VP/VN and GND.
Analog Signal Range
The devices switch signals in the range from -25V to +25V
that are above and below their rails. The on-resistance for
these devices exhibit a high degree of flatness of 2.4mI
(MAX14759 typ) and 5.1mI (MAX14761/MAX14763 typ)
over the whole input voltage range of -25V to +25V. The
analog switches allow bidirectional current flow, so A, A1,
Maxim Integrated
A2, B, B1, B2, and COM can be used as either inputs or
outputs.
Bypass Capacitors
Bias stabilizing capacitors are required on the VP and VN
pins. 1FF ceramic capacitors are suggested for effective
operation. VP and VN are not intended as a power supply
for other circuitry.
Applications Information
Nonpowered Condition
The MAX14759/MAX14761/MAX14763 can tolerate input
voltages on the A, B, or COM pins in the ±25V range
when it is not powered. When VDD = 0V, the DC input
leakage current into the A, B, or COM pins is typically
below 1µA. Some devices can have a larger leakage
current up to the mA range due to technology spread.
With VDD not powered, internal diodes between the
analog pins and the VP and VN charge up the external
capacitors on VP and VN when positive and/or negative
voltages are applied to these pins. This causes transient
input current flow.
Large dv/dt on the inputs causes large capacitive charg-
ing currents, which have to be limited to 300mA to avoid
destroying the internal diodes. Hence, the 100nF capaci-
tors on VP and VN, the dv/dt must be limited to 3V/µs. Once
the capacitors reach their final voltage, the input current
decays to the leakage current levels mentioned above.
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