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MAX16122 Datasheet, PDF (10/16 Pages) Maxim Integrated Products – Dual Pushbutton Controllers in Tiny 6-Bump WLP Package
MAX16122–MAX16125
Dual Pushbutton Controllers in
Tiny 6-Bump WLP Package
Supply Voltage Monitor
The MAX16122–MAX16125 have an internal comparator
with a programmable trip threshold to monitor the sup-
ply voltage. The VCC monitoring thresholds are select-
able through the part number suffix (see the Ordering
Information and Table 3).
Applications Information
Falling VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the MAX16122–
MAX16125 are relatively immune to short-duration fall-
ing VCC transients (glitches). The Typical Operating
Characteristics show the Maximum Transient Duration
vs. VCC Overdrive graph for which the MAX16122–
MAX16125 do not generate a reset pulse. This graph was
generated using a falling pulse applied to VCC starting
above the actual reset threshold and ending below the
threshold by the magnitude indicated (VCC overdrive).
The graph indicates the typical maximum pulse width that
a falling transient can have without initiating a reset pulse.
As the magnitude of the transient increases (go farther
below the reset threshold), the maximum allowable pulse
width decreases.
Ensuring a Valid RESET Output Down to
VCC = 0V (Push-Pull RESET Output)
The MAX16122–MAX16125 guarantee proper operation
down to VCC = 0.95V. In applications that require valid
reset levels down to VCC = 0V, add a pulldown resis-
tor between RESET and GND for the push-pull outputs
(MAX16122/MAX16124). The resistor sinks any stray
leakage currents, holding RESET low (Figure 2). The
resistor value used is not critical, but it must be small
enough not to overload the RESET output when VCC
is above the reset threshold. For most applications, use
100kΩ to 1MΩ. This scheme does not work with open-
drain outputs of the MAX16123/MAX16125.
Layout and Bypassing
Ensure 0.1µF (minimum) capacitance is connected from
VCC to GND.
VCC
VCC
MAX16122
MAX16124
RESET
GND
100kΩ
Figure 2. Ensuring RESET Output to VCC = 0V
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