MAX14611 Datasheet, PDF (10/15 Pages) Maxim Integrated Products – Quad Bidirectional Low-Voltage Logic-Level Translator

MAX14611
Quad Bidirectional Low-Voltage
Logic-Level Translator
Pin Configurations
TOP VIEW
I/OVL1 1 ₊
I/OVL2 2
TS 3
N.C. 4
I/OVL3 5
I/OVL4 6
GND 7
MAX14611
*EP
TDFN
*CONNECT EXPOSED PAD TO GND.
14 V_CC
13 I/OVCC1
12 I/OVCC2
11 N.C.
10 VL
9 I/OVCC3
8 I/OVCC4
+
VL 1
I/OVL1 2
I/OVL2 3
I/OVL3 4
MAX14611
I/OVL4 5
N.C. 6
GND 7
TSSOP
14 VCC
13 I/OVCC1
12 I/OVCC2
11 I/OVCC3
10 I/OVCC4
9 N.C.
8 TS
Pin Description
PIN
TDFN-EP TSSOP
1
2
2
3
3
8
4, 11
6,9
5
4
6
5
7
7
8
10
9
11
10
1
12
12
13
13
14
14
—
—
NAME
FUNCTION
I/OVL1
I/OVL2
TS
N.C.
Input/Output 1. Reference to V_L.
Input/Output 2. Reference to V_L.
Three-State Select Input. Drive TS low to place the device in three-state output mode. I/OVCC_
and I/OVL_ are high impedance in three-state output mode.
Note: Logic referenced to V_L (for logic thresholds, see the Electrical Characteristics table).
No Connection. Not internally connected.
I/OVL3
I/OVL4
GND
Input/Output 3. Reference to V_L.
Input/Output 4. Reference to V_L.
Ground
I/OVCC4
I/OVCC3
V_L
Input/Output 4. Reference to V_CC.
Input/Output 3. Reference to V_CC.
Logic Supply Voltage Input, 0.9V P V_L P min (5.0V, (V_CC + 0.3V)). Connect a 0.1FF ceramic
capacitor as close as possible to the pin.
I/OVCC2
I/OVCC1
V_CC
Input/Output 2. Reference to V_CC.
Input/Output 1. Reference to V_CC.
Power Supply Input. The supply range is 1.65V P V_CC P 5.5V. Bypass V_CC with a 1FF ceramic
capacitor as close as possible to the pin to achieve higher ESD protection (Q6kV HBM).
EP
Exposed Pad (TDFN Only). EP is internally connected to GND. Connect to a large ground
plane to maximize thermal performance. Not intended as an electrical connection point.
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