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MAX1165-MAX1166 Datasheet, PDF (10/15 Pages) Maxim Integrated Products – Low-Power, 16-Bit Analog-to-Digital Converters with Parallel Interface
Low-Power, 16-Bit Analog-to-Digital Converter
with Parallel Interface
ACQUISITION
DATA
CONVERSION
OUT
ACQUISITION
DATA
CONVERSION
OUT
CS
REF POWER-
DOWN BIT
R/C
CS
REF POWER-
DOWN BIT
R/C
EOC
EOC
REF
AND
BUFFER
Figure 5. Selecting Standby Mode
REF
AND
BUFFER
Figure 6. Selecting Shutdown Mode
Selecting Standby or Shutdown Mode
The MAX1165/MAX1166 have a selectable standby or
low-power shutdown mode. In standby mode, the
ADC’s internal reference and reference buffer do not
power down between conversions, eliminating the need
to wait for the reference to power up before performing
the next conversion. Shutdown mode powers down the
reference and reference buffer after completing a con-
version. The reference and reference buffer require a
minimum of 10ms (CREFADJ = 0.1µF, CREF = 4.7µF) to
power up and settle from shutdown.
The state of R/C at the second falling edge of CS
selects which power-down mode the MAX1165/
MAX1166 enter upon conversion completion. Holding
R/C low causes the MAX1165/MAX1166 to enter stand-
by mode. The reference and buffer are left on after the
conversion completes. R/C high causes the MAX1165/
MAX1166 to enter shutdown mode and shut down the
reference and buffer after conversion (Figures 5 and 6).
When using an external reference, set the REF power-
down bit high for lowest current operation.
Standby Mode
While in standby mode, the supply current is reduced
to less than 1mA (typ). The next falling edge of CS with
R/C low causes the MAX1165/MAX1166 to exit standby
mode and begin acquisition. The reference and refer-
ence buffer remain active to allow quick turn-on time.
Standby mode allows significant power savings while
running at the maximum sample rate.
Shutdown Mode
In shutdown mode, the reference and reference buffer
are shut down between conversions. Shutdown mode
reduces supply current to 0.5µA (typ) immediately after
the conversion. The falling edge of CS with R/C low
causes the reference and buffer to wake up and enter
acquisition mode. To achieve 16-bit accuracy, allow
10ms (CREFADJ = 0.1µF, CREF = 4.7µF) for the internal
reference to wake up.
Internal and External Reference
Internal Reference
The internal reference of the MAX1165/MAX1166 is
internally buffered to provide +4.096V output at REF.
Bypass REF to AGND and REFADJ to AGND with 4.7µF
and 0.1µF, respectively.
Fine adjustments can be made to the internal reference
voltage by sinking or sourcing current at REFADJ. The
input impedance of REFADJ is nominally 5kΩ. The
internal reference voltage is adjustable to ±1.5% with
the circuit of Figure 7.
+5V
100kΩ
150kΩ
68kΩ
0.1µF
MAX1165
MAX1166
REFADJ
Figure 7. MAX1165/MAX1166 Reference Adjust Circuit
External Reference
An external reference can be placed at either the input
(REFADJ) or the output (REF) of the MAX1165/
MAX1166s’ internal buffer amplifier. When connecting an
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