MAX1955 Datasheet, PDF (1/22 Pages) Maxim Integrated Products – 1.6V to 5.5V Input, 0.5% Accurate, Dual 180° Out-of-Phase Step-Down Controllers

19-2623; Rev 0; 1/03
1.6V ^{EVAALVUAAILTAIOBNLEKIT} to 5.5V Input, 0.5% Accurate, Dual
180° Out-of-Phase Step-Down Controllers
General Description
The MAX1955/MAX1956 are dual-output, fixed-frequency,
voltage-mode, pulse-width modulated (PWM) step-down
controllers with 0.5% output accuracy. Each controller
switches at a constant 600kHz and is 180° out-of-phase
with the other controller, reducing input ripple current
and the number of input capacitors.
An on-chip bias supply generates a 5V gate drive to
deliver up to 25A output current per phase with low-cost
N-channel MOSFETs at up to 93% efficiency. Lossless
adjustable current limit eliminates expensive current-
sense resistors and improves efficiency. Foldback current
limit reduces power dissipation during short-circuit
conditions and handles transient overloads better than
controllers using hiccup-mode short-circuit protection.
Output voltage margining shifts output voltage by
±4% from the nominal value to simplify system test.
Outputs also can be powered up and down in select-
able sequences to meet core and logic supply-rail
requirements.
The MAX1955/MAX1956 are available in a 28-lead thin
QFN package with exposed pad.
Applications
Base Stations
Telecom and Network Equipment
Servers
DSP, ASIC, µP, and FPGA Supplies
INPUT
1.6V TO 5.5V
Features
o Operates from a 1.6V to 5.5V Supply (MAX1956)
o 0.5% Output Accuracy
o 0.8V to 0.9V_IN Output Range
o Up to 25A per Phase Output Current
o On-Chip Boost Regulator Provides 5V Gate Drive
o Up to 93% Efficiency
o 180° Out-of-Phase Operation
o ±4% Voltage Margining
o Lossless, Foldback Current Limit
o Selectable Voltage Sequencing
o Synchronizable to External Clock
o Digital Soft-Start and Soft-Stop
o Small 28-Pin, 5mm ✕ 5mm Thin QFN Package
Ordering Information
PART
TEMP RANGE
MAX1955ETI
-40°C to +85°C
MAX1956ETI
-40°C to +85°C
*EP = Exposed pad.
PIN-PACKAGE
28 Thin QFN-EP*
28 Thin QFN-EP*
Pin Configuration appears at end of data sheet.
Typical Operating Circuit
VDD
OUTPUT 1
0.8V TO 0.9VIN
UP TO 25A
SYNCHRONIZATION
CLOCK
ON/OFF
VOLTAGE
MARGINING
IN
VDD
LXB
BST2
BST1
DH2
DH1
LX2
LX1
MAX1956 _DL2
DL1
PGND
FB2
FB1
COMP1
SEQ
SYNC
COMP2
REF
GND
ILIM1
ILIM2
EN
AVDD
OUTPUT 2
0.8V TO 0.9VIN
UP TO 25A
VDD
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