MAX1150 Datasheet, PDF (1/8 Pages) Maxim Integrated Products – 8-Bit, 500Msps Flash ADC

19-1169; Rev 0; 12/96
EVAALVUAAILTAIOBNLEKIT
8-Bit, 500Msps Flash ADC
_______________General Description
The MAX1150 is a parallel flash analog-to-digital con-
verter (ADC) capable of digitizing full-scale (0V to
-2V) inputs into 8-bit digital words at an update rate of
500Msps. The ECL-compatible outputs are demuxed
into two separate output banks, each with differential
data-ready outputs to ease the task of data capture.
The MAX1150’s wide input bandwidth and low capaci-
tance eliminate the need for external track/hold amplifi-
ers for most applications. A proprietary decoding
scheme reduces metastable errors to 1LSB. This
device operates from a single -5.2V supply, with a nom-
inal power dissipation of 5.5W.
______________Ordering Information
PART
MAX1150AIZS
MAX1150BIZS
TEMP. RANGE
-20°C to +85°C
-20°C to +85°C
PIN-PACKAGE
80 MQUAD
80 MQUAD
____________________________Features
o 1:2 Demuxed ECL-Compatible Outputs
o Wide Input Bandwidth: 900MHz
o Low Input Capacitance: 15pF
o Metastable Errors Reduced to 1LSB
o Single -5.2V Supply
________________________Applications
Digital Oscilloscopes
Data Acquisition
Transient-Capture Applications
Radar, EW, ECM
Direct RF/IF Downconversion
Pin Configuration appears on last page.
_________________________________________________________Functional Diagram
CLK NCLK
ANALOG
VRT INPUT
PREAMP COMPARATOR
255
CLOCK
BUFFER
DEMUX
CLOCK BUFFER
MAX1150
254
D8
D8B
(OVR)
D7B
•
152
•
D7
D5B
(MSB)
•
151
•
D6
D2B
D1B
128
D5
VRM
D0B
127
D8A
D4
D7A
•
64
D3
•
•
D5A
63
D2
•
•
•
2
D2A
D1
D1A
1
D0
(LSB)
D0A
VFB
NDRB (NOT DATA READY)
DRB (DATA READY)
D8B (OVR)
D7B (MSB)
D6B
D5B
D4B
D3B
D2B
D1B
D0B (LSB)
NDRA (NOT DATA READY)
DRA (DATA READY)
D8A (OVR)
D7A (MSB)
D6A
D5A
D4A
D3A
D2A
D1A
D0A (LSB)
BANK B
BANK A
________________________________________________________________ Maxim Integrated Products 1
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